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Message-ID: <f5e79cfe-6ea3-44c5-bb86-41cccef1401f@rock-chips.com>
Date: Thu, 22 Jan 2026 11:16:40 +0800
From: Chaoyi Chen <chaoyi.chen@...k-chips.com>
To: Andrew Lunn <andrew@...n.ch>, Chaoyi Chen <kernel@...kyi.com>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Heiko Stuebner <heiko@...ech.de>,
 Alexey Charkov <alchark@...il.com>, Shawn Lin <shawn.lin@...k-chips.com>,
 Sebastian Reichel <sebastian.reichel@...labora.com>,
 Andy Yan <andy.yan@...k-chips.com>,
 Nicolas Frattaroli <nicolas.frattaroli@...labora.com>,
 Detlev Casanova <detlev.casanova@...labora.com>,
 Stephen Chen <stephen@...xa.com>, devicetree@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/3] arm64: dts: rockchip: Change gmac phy-mode to
 rgmii-id for rk3576 evb1

Hi Andrew,

On 1/22/2026 10:40 AM, Andrew Lunn wrote:
> On Thu, Jan 22, 2026 at 09:38:17AM +0800, Chaoyi Chen wrote:
>> Hi Andrew,
>>
>> On 1/21/2026 8:55 PM, Andrew Lunn wrote:
>>>> @@ -721,6 +719,7 @@ rgmii_phy0: ethernet-phy@1 {
>>>>  		reset-assert-us = <20000>;
>>>>  		reset-deassert-us = <100000>;
>>>>  		reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
>>>> +		tx-internal-delay-ps = <1950>;
>>>
>>> The PHY should add 2000ps, as required by the RGMII standard. The
>>> difference is so small there is no need for tx-internal-delay.
>>>
>>
>> Thank you for the clarification. I chose 1950 here because I find that
>> the MotorComm yt8xxx Ethernet PHY binding only offer the options of 
>> 1950 or 2100. 
>>
>>> In most cases, 'rmgii-id' should be sufficient, unless the PCB is
>>> badly designed.
>>>
>>
>> I suspect the ROCK 4D board might be an exception. Sebastian once
>> reported that it wouldn't work properly under "rgmii-id". Well, I'm
>> not sure what strategy to adopt in this case.
> 
> Please check the report. And also, check what the PHY is doing for
> delays if you don't specify the property. Is it defaulting to near
> 2000ps?
> 

It is RTL8211F PHY. The origin report is here:

https://lore.kernel.org/all/20250724-rk3576-rock4d-phy-timings-v1-1-1cdce2b4aca4@kernel.org/

The RTL8211F binding doesn't provide any indication of the default
delay value. I'll checking datasheet to see if it's mentioned there.

-- 
Best, 
Chaoyi

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