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Message-ID: <CAPVz0n1F3tynph9e6+ts+N9etyGm6fAZGYixW0FCTwOsh==LRQ@mail.gmail.com>
Date: Thu, 22 Jan 2026 10:13:18 +0200
From: Svyatoslav Ryhel <clamor95@...il.com>
To: Mikko Perttunen <mperttunen@...dia.com>
Cc: Krzysztof Kozlowski <krzk@...nel.org>, Rob Herring <robh@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Thierry Reding <treding@...dia.com>, Thierry Reding <thierry.reding@...il.com>,
Jonathan Hunter <jonathanh@...dia.com>, Prashant Gaikwad <pgaikwad@...dia.com>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>,
Dmitry Osipenko <digetx@...il.com>, MyungJoo Ham <myungjoo.ham@...sung.com>,
Kyungmin Park <kyungmin.park@...sung.com>, Chanwoo Choi <cw00.choi@...sung.com>,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-tegra@...r.kernel.org, linux-clk@...r.kernel.org,
linux-pm@...r.kernel.org
Subject: Re: [PATCH v4 11/12] ARM: tegra: Add EMC OPP and ICC properties to
Tegra114 EMC and ACTMON device-tree nodes
чт, 22 січ. 2026 р. о 07:46 Mikko Perttunen <mperttunen@...dia.com> пише:
>
> On Thursday, January 22, 2026 1:57 AM Svyatoslav Ryhel wrote:
> > ср, 21 січ. 2026 р. о 09:56 Mikko Perttunen <mperttunen@...dia.com> пише:
> > >
> > > On Tuesday, November 25, 2025 9:05 PM Svyatoslav Ryhel wrote:
> > > > Add EMC OPP tables and interconnect paths that will be used for
> > > > dynamic memory bandwidth scaling based on memory utilization statistics.
> > > >
> > > > Signed-off-by: Svyatoslav Ryhel <clamor95@...il.com>
> > > > ---
> > > > .../dts/nvidia/tegra114-peripherals-opp.dtsi | 151 ++++++++++++++++++
> > > > arch/arm/boot/dts/nvidia/tegra114.dtsi | 9 ++
> > > > 2 files changed, 160 insertions(+)
> > > > create mode 100644 arch/arm/boot/dts/nvidia/tegra114-peripherals-opp.dtsi
> > > >
> > > > diff --git a/arch/arm/boot/dts/nvidia/tegra114-peripherals-opp.dtsi b/arch/arm/boot/dts/nvidia/tegra114-peripherals-opp.dtsi
> > > > new file mode 100644
> > > > index 000000000000..1a0e68f22039
> > > > --- /dev/null
> > > > +++ b/arch/arm/boot/dts/nvidia/tegra114-peripherals-opp.dtsi
> > > > @@ -0,0 +1,151 @@
> > > > +// SPDX-License-Identifier: GPL-2.0
> > > > +
> > > > +/ {
> > > > + emc_icc_dvfs_opp_table: opp-table-emc {
> > > > + compatible = "operating-points-v2";
> > > > +
> > > > + opp-12750000-900 {
> > > > + opp-microvolt = <900000 900000 1390000>;
> > > > + opp-hz = /bits/ 64 <12750000>;
> > > > + opp-supported-hw = <0x000F>;
> > > > + };
> > >
> > > What's the source of the opp data?
> > >
> >
> > I have used tf701t (T40X) and tegratab (T40S) kernel sources, to be
> > more specific board-*-memory.c files. Timing struct for each clock
> > contains min voltage field which was used to compose these opps.
> > 1390000 is the max core regulator voltage, taken from tegra11_dvfs.c
>
> Thanks! I also looked through SHIELD Portable (roth, T40T) memory tables and this appears to match except for the 528MHz opp.
>
> The opp table here is setting the voltage for the 528MHz opp to 1050mV for the high end SKUs (T40X and T40T)[1] and 1100mV for the lower end T40S, which makes sense. However, the roth memory table (rel-roth branch) specifies 1100mV for the 528MHz opp. My understanding is T40T is supposed to be at least as good silicon as T40X, so it doesn't make sense to me that it would require a higher voltage, but memory timings are a dark art and I would err on the baseline side and keep the voltage at 1100mV. Let me know what you think or if you have additional information.
If roth requires 1100mV for 528MHz opp there should be a reason for
that, maybe we are just not aware or it since it may be not
documented/not public/empirical. I see no issue in setting it to
1100mV for both T40X and T40T since they both can work with this
voltage. I will add a comment in case there will be enough T40T users
who can check if 1050mV for 528MHz work stable enough to lower voltage
later on.
>
> FWIW, roth also specifies a 900MHz opp. I think in principle T40X/T40T in general can reach this but it might only have been characterized for roth.
>
Very nice, then I will include 900MHz opp in the next iteration. It is
always better to have a wider coverage. Thank you!
Best regards,
Svyatoslav R.
> [1] T40X is SKU 0x3 and T40T is SKU 0x4, and these are mapped to soc_speedo_id=1 -> supported_hw BIT(1).
>
> >
> > I have converted an entire core_dvfs_table table from tegra11_dvfs.c
> > and I am planning to submit those later on too along with
> > powergates/domains configuration for tegra114, but that is for another
> > time :)
>
> Sounds good!
>
> Thanks,
> Mikko
>
> >
> > > Cheers,
> > > Mikko
> > >
> > > > +
> > > > + opp-20400000-900 {
> > > > + opp-microvolt = <900000 900000 1390000>;
> > > > + opp-hz = /bits/ 64 <20400000>;
> > > > + opp-supported-hw = <0x000F>;
> > > > + };
> > > > +
> > > > + opp-40800000-900 {
> > > > + opp-microvolt = <900000 900000 1390000>;
> > > > + opp-hz = /bits/ 64 <40800000>;
> > > > + opp-supported-hw = <0x000F>;
> > > > + };
> > > > +
> > > > + opp-68000000-900 {
> > > > + opp-microvolt = <900000 900000 1390000>;
> > > > + opp-hz = /bits/ 64 <68000000>;
> > > > + opp-supported-hw = <0x000F>;
> > > > + };
> > > > +
> > > > + opp-102000000-900 {
> > > > + opp-microvolt = <900000 900000 1390000>;
> > > > + opp-hz = /bits/ 64 <102000000>;
> > > > + opp-supported-hw = <0x000F>;
> > > > + };
> > > > +
> > > > + opp-204000000-900 {
> > > > + opp-microvolt = <900000 900000 1390000>;
> > > > + opp-hz = /bits/ 64 <204000000>;
> > > > + opp-supported-hw = <0x000F>;
> > > > + opp-suspend;
> > > > + };
> > > > +
> > > > + opp-312000000-1000 {
> > > > + opp-microvolt = <1000000 1000000 1390000>;
> > > > + opp-hz = /bits/ 64 <312000000>;
> > > > + opp-supported-hw = <0x000F>;
> > > > + };
> > > > +
> > > > + opp-408000000-1000 {
> > > > + opp-microvolt = <1000000 1000000 1390000>;
> > > > + opp-hz = /bits/ 64 <408000000>;
> > > > + opp-supported-hw = <0x000F>;
> > > > + };
> > > > +
> > > > + opp-528000000-1050 {
> > > > + opp-microvolt = <1050000 1050000 1390000>;
> > > > + opp-hz = /bits/ 64 <528000000>;
> > > > + opp-supported-hw = <0x000E>;
> > > > + };
> > > > +
> > > > + opp-528000000-1100 {
> > > > + opp-microvolt = <1100000 1100000 1390000>;
> > > > + opp-hz = /bits/ 64 <528000000>;
> > > > + opp-supported-hw = <0x0001>;
> > > > + };
> > > > +
> > > > + opp-624000000-1100 {
> > > > + opp-microvolt = <1100000 1100000 1390000>;
> > > > + opp-hz = /bits/ 64 <624000000>;
> > > > + opp-supported-hw = <0x000F>;
> > > > + };
> > > > +
> > > > + opp-792000000-1100 {
> > > > + opp-microvolt = <1100000 1100000 1390000>;
> > > > + opp-hz = /bits/ 64 <792000000>;
> > > > + opp-supported-hw = <0x000F>;
> > > > + };
> > > > + };
> > > > +
> > > > + emc_bw_dfs_opp_table: opp-table-actmon {
> > > > + compatible = "operating-points-v2";
> > > > +
> > > > + opp-12750000 {
> > > > + opp-hz = /bits/ 64 <12750000>;
> > > > + opp-supported-hw = <0x000F>;
> > > > + opp-peak-kBps = <204000>;
> > > > + };
> > > > +
> > > > + opp-20400000 {
> > > > + opp-hz = /bits/ 64 <20400000>;
> > > > + opp-supported-hw = <0x000F>;
> > > > + opp-peak-kBps = <326400>;
> > > > + };
> > > > +
> > > > + opp-40800000 {
> > > > + opp-hz = /bits/ 64 <40800000>;
> > > > + opp-supported-hw = <0x000F>;
> > > > + opp-peak-kBps = <652800>;
> > > > + };
> > > > +
> > > > + opp-68000000 {
> > > > + opp-hz = /bits/ 64 <68000000>;
> > > > + opp-supported-hw = <0x000F>;
> > > > + opp-peak-kBps = <1088000>;
> > > > + };
> > > > +
> > > > + opp-102000000 {
> > > > + opp-hz = /bits/ 64 <102000000>;
> > > > + opp-supported-hw = <0x000F>;
> > > > + opp-peak-kBps = <1632000>;
> > > > + };
> > > > +
> > > > + opp-204000000 {
> > > > + opp-hz = /bits/ 64 <204000000>;
> > > > + opp-supported-hw = <0x000F>;
> > > > + opp-peak-kBps = <3264000>;
> > > > + opp-suspend;
> > > > + };
> > > > +
> > > > + opp-312000000 {
> > > > + opp-hz = /bits/ 64 <312000000>;
> > > > + opp-supported-hw = <0x000F>;
> > > > + opp-peak-kBps = <4992000>;
> > > > + };
> > > > +
> > > > + opp-408000000 {
> > > > + opp-hz = /bits/ 64 <408000000>;
> > > > + opp-supported-hw = <0x000F>;
> > > > + opp-peak-kBps = <6528000>;
> > > > + };
> > > > +
> > > > + opp-528000000 {
> > > > + opp-hz = /bits/ 64 <528000000>;
> > > > + opp-supported-hw = <0x000F>;
> > > > + opp-peak-kBps = <8448000>;
> > > > + };
> > > > +
> > > > + opp-624000000 {
> > > > + opp-hz = /bits/ 64 <624000000>;
> > > > + opp-supported-hw = <0x000F>;
> > > > + opp-peak-kBps = <9984000>;
> > > > + };
> > > > +
> > > > + opp-792000000 {
> > > > + opp-hz = /bits/ 64 <792000000>;
> > > > + opp-supported-hw = <0x000F>;
> > > > + opp-peak-kBps = <12672000>;
> > > > + };
> > > > + };
> > > > +};
> > > > diff --git a/arch/arm/boot/dts/nvidia/tegra114.dtsi b/arch/arm/boot/dts/nvidia/tegra114.dtsi
> > > > index a920ad041c14..6221423b81d1 100644
> > > > --- a/arch/arm/boot/dts/nvidia/tegra114.dtsi
> > > > +++ b/arch/arm/boot/dts/nvidia/tegra114.dtsi
> > > > @@ -8,6 +8,8 @@
> > > > #include <dt-bindings/soc/tegra-pmc.h>
> > > > #include <dt-bindings/thermal/tegra114-soctherm.h>
> > > >
> > > > +#include "tegra114-peripherals-opp.dtsi"
> > > > +
> > > > / {
> > > > compatible = "nvidia,tegra114";
> > > > interrupt-parent = <&lic>;
> > > > @@ -323,6 +325,9 @@ actmon: actmon@...0c800 {
> > > > clock-names = "actmon", "emc";
> > > > resets = <&tegra_car TEGRA114_CLK_ACTMON>;
> > > > reset-names = "actmon";
> > > > + operating-points-v2 = <&emc_bw_dfs_opp_table>;
> > > > + interconnects = <&mc TEGRA114_MC_MPCORER &emc>;
> > > > + interconnect-names = "cpu-read";
> > > > #cooling-cells = <2>;
> > > > };
> > > >
> > > > @@ -655,6 +660,7 @@ mc: memory-controller@...19000 {
> > > >
> > > > #reset-cells = <1>;
> > > > #iommu-cells = <1>;
> > > > + #interconnect-cells = <1>;
> > > > };
> > > >
> > > > emc: external-memory-controller@...1b000 {
> > > > @@ -665,6 +671,9 @@ emc: external-memory-controller@...1b000 {
> > > > clock-names = "emc";
> > > >
> > > > nvidia,memory-controller = <&mc>;
> > > > + operating-points-v2 = <&emc_icc_dvfs_opp_table>;
> > > > +
> > > > + #interconnect-cells = <0>;
> > > > };
> > > >
> > > > hda@...30000 {
> > > >
> > >
> > >
> > >
> > >
>
>
>
>
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