linux-kernel - Re: [PATCH 0/7] [PULL REQUEST] Intel IOMMU updates for v6.20

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Message-ID: <5s7q45wy6zqraatc3we2zblj7kb523q43wep35fcigaudixxmk@bckk4jfg54lt>
Date: Thu, 22 Jan 2026 09:20:58 +0100
From: Joerg Roedel <joro@...tes.org>
To: Lu Baolu <baolu.lu@...ux.intel.com>
Cc: Yi Liu <yi.l.liu@...el.com>, Dmytro Maluka <dmaluka@...omium.org>, 
	Jinhui Guo <guojinhui.liam@...edance.com>, iommu@...ts.linux.dev, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/7] [PULL REQUEST] Intel IOMMU updates for v6.20

On Thu, Jan 22, 2026 at 09:48:49AM +0800, Lu Baolu wrote:
> Hi Joerg,
> 
> The following changes have been queued for v6.20-rc1. They are about
> some non-critical fixes, including:
> 
>  - Skip dev-iotlb flush for inaccessible PCIe device
>  - Flush cache for PASID table before using it
>  - Use right invalidation method for SVA and NESTED domains
>  - Ensure atomicity in context and PASID entry updates
> 
> These patches are based on v6.19-rc6. Please consider them for the
> iommu/vt-d branch.
> 
> Best regards,
> baolu
> 
> Dmytro Maluka (1):
>   iommu/vt-d: Flush cache for PASID table before using it
> 
> Jinhui Guo (2):
>   iommu/vt-d: Skip dev-iotlb flush for inaccessible PCIe device without
>     scalable mode
>   iommu/vt-d: Flush dev-IOTLB only when PCIe device is accessible in
>     scalable mode
> 
> Lu Baolu (3):
>   iommu/vt-d: Clear Present bit before tearing down PASID entry
>   iommu/vt-d: Clear Present bit before tearing down context entry
>   iommu/vt-d: Fix race condition during PASID entry replacement
> 
> Yi Liu (1):
>   iommu/vt-d: Flush piotlb for SVM and Nested domain
> 
>  drivers/iommu/intel/iommu.h  |  21 +++-
>  drivers/iommu/intel/pasid.h  |  28 ++---
>  drivers/iommu/intel/cache.c  |   9 +-
>  drivers/iommu/intel/iommu.c  |  33 +++---
>  drivers/iommu/intel/nested.c |   9 +-
>  drivers/iommu/intel/pasid.c  | 212 ++++-------------------------------
>  6 files changed, 83 insertions(+), 229 deletions(-)

Applied all, thanks Baolu.