linux-kernel - RE: [PATCH v2] pmdomain: imx: gpcv2: Fix the imx8mm gpu hang due to wrong adb400 reset

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Message-ID:
 <VE1PR04MB721300DE72A9181F0A8A470E8797A@VE1PR04MB7213.eurprd04.prod.outlook.com>
Date: Thu, 22 Jan 2026 10:17:33 +0000
From: Jacky Bai <ping.bai@....com>
To: Daniel Baluta <daniel.baluta@...il.com>
CC: Ulf Hansson <ulf.hansson@...aro.org>, Shawn Guo <shawnguo@...nel.org>,
	Sascha Hauer <s.hauer@...gutronix.de>, Lucas Stach <l.stach@...gutronix.de>,
	Pengutronix Kernel Team <kernel@...gutronix.de>, Fabio Estevam
	<festevam@...il.com>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski
	<krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
	"linux-pm@...r.kernel.org" <linux-pm@...r.kernel.org>, "imx@...ts.linux.dev"
	<imx@...ts.linux.dev>, "linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>
Subject: RE: [PATCH v2] pmdomain: imx: gpcv2: Fix the imx8mm gpu hang due to
 wrong adb400 reset

> Subject: Re: [PATCH v2] pmdomain: imx: gpcv2: Fix the imx8mm gpu hang due
> to wrong adb400 reset
> 
> On Thu, Jan 22, 2026 at 7:54 AM Jacky Bai <ping.bai@....com> wrote:
> >
> > On i.MX8MM, the GPUMIX, GPU2D, and GPU3D blocks share a common
> reset
> > domain. Due to this hardware limitation, powering off/on GPU2D or
> > GPU3D also triggers a reset of the GPUMIX domain, including its ADB400
> port.
> > However, The ADB400 interface must always be placed into power‑down
> > before being reset.
> >
> > Currently the GPUMIX and GPU2D/3D power domains rely on runtime PM
> to
> > handle dependency ordering. In some corner cases, the GPUMIX power‑off
> > sequence is skipped, leaving the ADB400 port active when GPU2D/3D
> resets.
> > This causes the GPUMIX ADB400 port to be reset while still active,
> > leading to unpredictable bus behavior and GPU hangs.
> >
> > To avoid this, refine the power‑domain control logic so that the
> > GPUMIX
> > ADB400 port is explicitly powered down and powered up as part of the
> > GPU power‑domain on/off sequence. This ensures proper ordering and
> > prevents incorrect ADB400 resets.
> >
> > Suggested by: Lucas Stach <l.stach@...gutronix.de>
> 
> Correct tag here is:
> 
> Suggested-by: Lucas Stach <l.stach@...gutronix.de>
> 
> Also, no need for a new line between tags.

Don’t know why it changed after sent out. Let me check and resend it.

BR
Jacky Bai
> >
> > Signed-off-by: Jacky Bai <ping.bai@....com>