| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <CAKfTPtD6LOMFGhzG3dhiSQCNbYrGLjBiT83eqz9mmwaDVpNV=w@mail.gmail.com>
Date: Fri, 23 Jan 2026 14:57:58 +0100
From: Vincent Guittot <vincent.guittot@...aro.org>
To: Khristine Andreea Barbulescu <khristineandreea.barbulescu@....nxp.com>
Cc: Linus Walleij <linus.walleij@...aro.org>, Bartosz Golaszewski <brgl@...ev.pl>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Chester Lin <chester62515@...il.com>, Matthias Brugger <mbrugger@...e.com>,
Ghennadi Procopciuc <ghennadi.procopciuc@....com>, Larisa Grigore <larisa.grigore@....com>,
Lee Jones <lee@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>, Fabio Estevam <festevam@...il.com>,
Dong Aisheng <aisheng.dong@....com>, Jacky Bai <ping.bai@....com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>, "Rafael J. Wysocki" <rafael@...nel.org>,
Alberto Ruiz <aruizrui@...hat.com>, Christophe Lizzi <clizzi@...hat.com>, devicetree@...r.kernel.org,
Enric Balletbo <eballetb@...hat.com>, Eric Chanudet <echanude@...hat.com>, imx@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org, linux-gpio@...r.kernel.org,
linux-kernel@...r.kernel.org, NXP S32 Linux Team <s32@....com>,
Pengutronix Kernel Team <kernel@...gutronix.de>
Subject: Re: [PATCH v8 06/10] pinctrl: s32g2: change the driver to also be
probed as an MFD cell
On Tue, 20 Jan 2026 at 12:59, Khristine Andreea Barbulescu
<khristineandreea.barbulescu@....nxp.com> wrote:
>
> From: Andrei Stefanescu <andrei.stefanescu@....nxp.com>
>
> The old pinctrl bindings for SIUL2 are deprecated by a previous commit.
> The new bindings for the SIUL2 represent it as an MFD device:
> - one cell for combined pinctrl&GPIO
> - two cella acting as syscon providers for SoC registers access
>
> This commit allows the existing driver to also be probed as an MFD cell.
> The changes only impact the way the driver initializes the regmaps for
> accessing MSCR and IMCR registers.
>
> Signed-off-by: Andrei Stefanescu <andrei.stefanescu@....nxp.com>
> Signed-off-by: Khristine Andreea Barbulescu <khristineandreea.barbulescu@....nxp.com>
[..]
> @@ -969,12 +1017,28 @@ int s32_pinctrl_probe(struct platform_device *pdev,
> s32_pinctrl_desc->confops = &s32_pinconf_ops;
> s32_pinctrl_desc->owner = THIS_MODULE;
>
> + ipctl->regions = devm_kcalloc(&pdev->dev, soc_data->mem_regions,
> + sizeof(*ipctl->regions), GFP_KERNEL);
> + if (!ipctl->regions)
> + return -ENOMEM;
> +
> + ipctl->legacy = soc_data->legacy;
> + if (soc_data->legacy)
> + ret = legacy_s32_pinctrl_regmap_init(pdev, ipctl);
> + else
> + ret = s32_pinctrl_mfd_regmap_init(pdev, ipctl);
> +
> + if (ret)
> + return dev_err_probe(&pdev->dev, ret,
> + "Failed to init driver regmap!\n");
> +
> ret = s32_pinctrl_probe_dt(pdev, ipctl);
> if (ret)
> return dev_err_probe(&pdev->dev, ret,
> "Fail to probe dt properties\n");
>
> - ret = devm_pinctrl_register_and_init(&pdev->dev, s32_pinctrl_desc,
> + ret = devm_pinctrl_register_and_init(s32_get_dev(ipctl),
you should better add a child node for your pinctrl mfd device in its
"nxp,s32g2-siul2" parent instead of registering the pinctrl device on
the parent device. This would fix phandle to gpio too
> + s32_pinctrl_desc,
> ipctl, &ipctl->pctl);
> if (ret)
> return dev_err_probe(&pdev->dev, ret,
> diff --git a/drivers/pinctrl/nxp/pinctrl-s32g2.c b/drivers/pinctrl/nxp/pinctrl-s32g2.c
> index c49d28793b69..2d56ffb1a109 100644
> --- a/drivers/pinctrl/nxp/pinctrl-s32g2.c
> +++ b/drivers/pinctrl/nxp/pinctrl-s32g2.c
> @@ -3,7 +3,7 @@
> * NXP S32G pinctrl driver
> *
> * Copyright 2015-2016 Freescale Semiconductor, Inc.
> - * Copyright 2017-2018, 2020-2022 NXP
> + * Copyright 2017-2018, 2020-2022, 2024-2025 NXP
> * Copyright (C) 2022 SUSE LLC
> */
>
> @@ -762,7 +762,7 @@ static const struct pinctrl_pin_desc s32_pinctrl_pads_siul2[] = {
> S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ31),
> };
>
> -static const struct s32_pin_range s32_pin_ranges_siul2[] = {
> +static const struct s32_pin_range legacy_s32_pin_ranges_siul2[] = {
> /* MSCR pin ID ranges */
> S32_PIN_RANGE(0, 101),
> S32_PIN_RANGE(112, 122),
> @@ -773,27 +773,47 @@ static const struct s32_pin_range s32_pin_ranges_siul2[] = {
> S32_PIN_RANGE(942, 1007),
> };
>
> -static const struct s32_pinctrl_soc_data s32_pinctrl_data = {
> +static const struct s32_pinctrl_soc_data legacy_s32_pinctrl_data = {
> .pins = s32_pinctrl_pads_siul2,
> .npins = ARRAY_SIZE(s32_pinctrl_pads_siul2),
> - .mem_pin_ranges = s32_pin_ranges_siul2,
> - .mem_regions = ARRAY_SIZE(s32_pin_ranges_siul2),
> + .mem_pin_ranges = legacy_s32_pin_ranges_siul2,
> + .mem_regions = ARRAY_SIZE(legacy_s32_pin_ranges_siul2),
> + .legacy = true,
> };
>
> static const struct of_device_id s32_pinctrl_of_match[] = {
> {
> .compatible = "nxp,s32g2-siul2-pinctrl",
> - .data = &s32_pinctrl_data,
> + .data = &legacy_s32_pinctrl_data,
> },
> { /* sentinel */ }
> };
> MODULE_DEVICE_TABLE(of, s32_pinctrl_of_match);
>
> +static const struct s32_pin_range s32_pin_ranges_siul2[] = {
> + /* MSCR pin ID ranges */
> + S32_PIN_RANGE(0, 101),
> + S32_PIN_RANGE(112, 190),
> + /* IMCR pin ID ranges */
> + S32_PIN_RANGE(512, 595),
> + S32_PIN_RANGE(631, 1007),
> +};
> +
> +static const struct s32_pinctrl_soc_data s32_pinctrl_data = {
> + .pins = s32_pinctrl_pads_siul2,
> + .npins = ARRAY_SIZE(s32_pinctrl_pads_siul2),
> + .mem_pin_ranges = s32_pin_ranges_siul2,
> + .mem_regions = ARRAY_SIZE(s32_pin_ranges_siul2),
> + .legacy = false,
> +};
> +
> static int s32g_pinctrl_probe(struct platform_device *pdev)
> {
> const struct s32_pinctrl_soc_data *soc_data;
>
> soc_data = of_device_get_match_data(&pdev->dev);
> + if (!soc_data)
> + soc_data = &s32_pinctrl_data;
>
> return s32_pinctrl_probe(pdev, soc_data);
> }
> --
> 2.50.1
>
Powered by blists - more mailing lists