linux-kernel - Re: [PATCH v3 10/15] can: grcan: Add saving and restoring of CAN FD baud-rate registers

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Message-ID: <20260123-original-manipulative-bulldog-07cf38-mkl@pengutronix.de>
Date: Fri, 23 Jan 2026 15:00:09 +0100
From: Marc Kleine-Budde <mkl@...gutronix.de>
To: Arun Muthusamy <arun.muthusamy@...sler.com>
Cc: robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org, 
	mailhol@...nel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	linux-can@...r.kernel.org, Daniel Hellstrom <daniel@...sler.com>
Subject: Re: [PATCH v3 10/15] can: grcan: Add saving and restoring of CAN FD
 baud-rate registers

On 22.01.2026 13:10:33, Arun Muthusamy wrote:
> From: Daniel Hellstrom <daniel@...sler.com>
>
> While reset the GRCAN baud-rates are preserved, since GRCANFD has the
> baud-rate in different registers we need to add saving of those
> registers too.
>
> Signed-off-by: Daniel Hellstrom <daniel@...sler.com>
> Signed-off-by: Arun Muthusamy <arun.muthusamy@...sler.com>
> ---
>  drivers/net/can/grcan.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
>
> diff --git a/drivers/net/can/grcan.c b/drivers/net/can/grcan.c
> index a2a5a5c868ff..0ee6e9bfbe7f 100644
> --- a/drivers/net/can/grcan.c
> +++ b/drivers/net/can/grcan.c
> @@ -517,15 +517,27 @@ static void grcan_reset(struct net_device *dev)
>  	struct grcan_priv *priv = netdev_priv(dev);
>  	struct grcan_registers __iomem *regs = priv->regs;
>  	u32 config = grcan_read_reg(&regs->conf);
> +	u32 nbtr, fdbtr;
> +
> +	if (priv->hwcap->fd) {
> +		nbtr = grcan_read_reg(&regs->nbtr);

Why do you save nbtr....

> +		fdbtr = grcan_read_reg(&regs->fdbtr);

   Who writes fdbtr in the first place?

> +	}
>
>  	grcan_set_bits(&regs->ctrl, GRCAN_CTRL_RESET);
>  	grcan_write_reg(&regs->conf, config);
> +	if (priv->hwcap->fd) {
> +		grcan_write_reg(&regs->nbtr, nbtr);
> +		grcan_write_reg(&regs->fdbtr, fdbtr);
> +	}
>
>  	priv->eskbp = grcan_read_reg(&regs->txrd);
>  	priv->can.state = CAN_STATE_STOPPED;
>
>  	/* Turn off hardware filtering - regs->rxcode set to 0 by reset */
>  	grcan_write_reg(&regs->rxmask, 0);
> +
> +	priv->hwcap->set_bittiming(dev);

...if you configure the bit timing again, wich writes nbtr?

regards,
Marc

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