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Message-ID: <rursscx7jihmvuf2piqqjsw4hebykybpplunreqrczivofo7ox@jvlyofgdryuk>
Date: Fri, 23 Jan 2026 20:08:00 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Abel Vesa <abel.vesa@....qualcomm.com>
Cc: Bjorn Andersson <andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Luca Weiss <luca.weiss@...rphone.com>,
Taniya Das <taniya.das@....qualcomm.com>,
Taniya Das <quic_tdas@...cinc.com>, linux-arm-msm@...r.kernel.org,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 4/4] clk: qcom: Add base clock controllers for Eliza SoC
On Fri, Jan 23, 2026 at 03:37:16PM +0200, Abel Vesa wrote:
> From: Taniya Das <taniya.das@....qualcomm.com>
>
> Add support for the Global, RPMh and TCSR clock controllers for the Eliza
> SoC. These are the clock controllers that are non-multimedia specific and
> are needed in order to be able to boot to shell, with rootfs on UFS.
>
> Signed-off-by: Taniya Das <taniya.das@....qualcomm.com>
> Signed-off-by: Abel Vesa <abel.vesa@....qualcomm.com>
> ---
> drivers/clk/qcom/Kconfig | 17 +
> drivers/clk/qcom/Makefile | 2 +
> drivers/clk/qcom/clk-rpmh.c | 20 +
> drivers/clk/qcom/gcc-eliza.c | 3160 +++++++++++++++++++++++++++++++++++++++
> drivers/clk/qcom/tcsrcc-eliza.c | 131 ++
> 5 files changed, 3330 insertions(+)
This is something new, having all three drivers in one email.
> diff --git a/drivers/clk/qcom/tcsrcc-eliza.c b/drivers/clk/qcom/tcsrcc-eliza.c
> new file mode 100644
> index 000000000000..9b53536f924d
> --- /dev/null
> +++ b/drivers/clk/qcom/tcsrcc-eliza.c
> @@ -0,0 +1,131 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> + */
> +
> +#include <linux/clk-provider.h>
> +#include <linux/mod_devicetable.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +
> +#include <dt-bindings/clock/qcom,eliza-tcsr.h>
> +
> +#include "clk-alpha-pll.h"
> +#include "clk-branch.h"
> +#include "clk-pll.h"
> +#include "clk-rcg.h"
> +#include "clk-regmap.h"
> +#include "clk-regmap-divider.h"
> +#include "clk-regmap-mux.h"
> +#include "common.h"
> +#include "gdsc.h"
> +#include "reset.h"
Are all these headers necessary?
> +
> +static struct clk_branch tcsr_pcie_0_clkref_en = {
> + .halt_reg = 0x0,
> + .halt_check = BRANCH_HALT_DELAY,
> + .clkr = {
> + .enable_reg = 0x0,
> + .enable_mask = BIT(0),
> + .hw.init = &(const struct clk_init_data) {
> + .name = "tcsr_pcie_0_clkref_en",
> + .ops = &clk_branch2_ops,
What happened to parents of these clocks?
> + },
> + },
> +};
> +
> +static struct clk_branch tcsr_ufs_clkref_en = {
> + .halt_reg = 0x8,
> + .halt_check = BRANCH_HALT_DELAY,
> + .clkr = {
> + .enable_reg = 0x8,
> + .enable_mask = BIT(0),
> + .hw.init = &(const struct clk_init_data) {
> + .name = "tcsr_ufs_clkref_en",
> + .ops = &clk_branch2_ops,
> + },
> + },
> +};
> +
> +static struct clk_branch tcsr_usb2_clkref_en = {
> + .halt_reg = 0x4,
> + .halt_check = BRANCH_HALT_DELAY,
> + .clkr = {
> + .enable_reg = 0x4,
> + .enable_mask = BIT(0),
> + .hw.init = &(const struct clk_init_data) {
> + .name = "tcsr_usb2_clkref_en",
> + .ops = &clk_branch2_ops,
> + },
> + },
> +};
> +
> +static struct clk_branch tcsr_usb3_clkref_en = {
> + .halt_reg = 0x10,
> + .halt_check = BRANCH_HALT_DELAY,
> + .clkr = {
> + .enable_reg = 0x10,
> + .enable_mask = BIT(0),
> + .hw.init = &(const struct clk_init_data) {
> + .name = "tcsr_usb3_clkref_en",
> + .ops = &clk_branch2_ops,
> + },
> + },
> +};
> +
> +static struct clk_regmap *tcsr_cc_eliza_clocks[] = {
> + [TCSR_PCIE_0_CLKREF_EN] = &tcsr_pcie_0_clkref_en.clkr,
> + [TCSR_UFS_CLKREF_EN] = &tcsr_ufs_clkref_en.clkr,
> + [TCSR_USB2_CLKREF_EN] = &tcsr_usb2_clkref_en.clkr,
> + [TCSR_USB3_CLKREF_EN] = &tcsr_usb3_clkref_en.clkr,
> +};
> +
> +static const struct regmap_config tcsr_cc_eliza_regmap_config = {
> + .reg_bits = 32,
> + .reg_stride = 4,
> + .val_bits = 32,
> + .max_register = 0x1c,
> + .fast_io = true,
> +};
> +
> +static const struct qcom_cc_desc tcsr_cc_eliza_desc = {
> + .config = &tcsr_cc_eliza_regmap_config,
> + .clks = tcsr_cc_eliza_clocks,
> + .num_clks = ARRAY_SIZE(tcsr_cc_eliza_clocks),
> +};
> +
> +static const struct of_device_id tcsr_cc_eliza_match_table[] = {
> + { .compatible = "qcom,eliza-tcsr" },
> + { }
> +};
> +MODULE_DEVICE_TABLE(of, tcsr_cc_eliza_match_table);
> +
> +static int tcsr_cc_eliza_probe(struct platform_device *pdev)
> +{
> + return qcom_cc_probe(pdev, &tcsr_cc_eliza_desc);
> +}
> +
> +static struct platform_driver tcsr_cc_eliza_driver = {
> + .probe = tcsr_cc_eliza_probe,
> + .driver = {
> + .name = "tcsr_cc-eliza",
> + .of_match_table = tcsr_cc_eliza_match_table,
> + },
> +};
> +
> +static int __init tcsr_cc_eliza_init(void)
> +{
> + return platform_driver_register(&tcsr_cc_eliza_driver);
> +}
> +subsys_initcall(tcsr_cc_eliza_init);
> +
> +static void __exit tcsr_cc_eliza_exit(void)
> +{
> + platform_driver_unregister(&tcsr_cc_eliza_driver);
> +}
> +module_exit(tcsr_cc_eliza_exit);
> +
> +MODULE_DESCRIPTION("QTI TCSR_CC ELIZA Driver");
> +MODULE_LICENSE("GPL");
>
> --
> 2.48.1
>
--
With best wishes
Dmitry
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