linux-kernel - Re: Re: Re: [PATCH v1 1/2] dt-bindings: ethernet: eswin: add clock sampling control

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <4e2a55e7.3662.19be8cb9c3c.Coremail.lizhi2@eswincomputing.com>
Date: Fri, 23 Jan 2026 11:00:16 +0800 (GMT+08:00)
From: 李志 <lizhi2@...incomputing.com>
To: "Andrew Lunn" <andrew@...n.ch>
Cc: devicetree@...r.kernel.org, andrew+netdev@...n.ch, davem@...emloft.net,
	edumazet@...gle.com, kuba@...nel.org, robh@...nel.org,
	krzk+dt@...nel.org, conor+dt@...nel.org, netdev@...r.kernel.org,
	pabeni@...hat.com, mcoquelin.stm32@...il.com,
	alexandre.torgue@...s.st.com, rmk+kernel@...linux.org.uk,
	linux-stm32@...md-mailman.stormreply.com,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	ningyu@...incomputing.com, linmin@...incomputing.com,
	pinkesh.vaghela@...fochips.com, weishangjuan@...incomputing.com
Subject: Re: Re: Re: [PATCH v1 1/2] dt-bindings: ethernet: eswin: add clock
 sampling control




> -----原始邮件-----
> 发件人: "Andrew Lunn" <andrew@...n.ch>
> 发送时间:2026-01-22 21:32:34 (星期四)
> 收件人: 李志 <lizhi2@...incomputing.com>
> 抄送: devicetree@...r.kernel.org, andrew+netdev@...n.ch, davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org, robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org, netdev@...r.kernel.org, pabeni@...hat.com, mcoquelin.stm32@...il.com, alexandre.torgue@...s.st.com, rmk+kernel@...linux.org.uk, linux-stm32@...md-mailman.stormreply.com, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, ningyu@...incomputing.com, linmin@...incomputing.com, pinkesh.vaghela@...fochips.com, weishangjuan@...incomputing.com
> 主题: Re: Re: [PATCH v1 1/2] dt-bindings: ethernet: eswin: add clock sampling control
> 
> > On EIC7700, RXC and RXD experience an internal skew before reaching the
> > MAC. At high speed, this can shift the effective sampling point by
> > approximately half a cycle, causing the MAC to sample the wrong nibble
> > on each edge.
> 
> You say internal. So the skew is fixed, it is a property of the
> silicon? If so, why a DT property? Why not just hard code it in the
> driver? Since it is internal, different boards should not need it set
> differently?
> 
Thanks for the question.

EIC7700 has two Ethernet MACs. Only eth1 has this internal RXC/RXD skew,
eth0 does not.

So this is not a chip-wide constant that can be hardcoded in the driver.
We need a way to distinguish the two MAC instances, which is why this is
described per-port in DTS.

--
Li Zhi