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Message-ID: <dc6e60ec-f460-4713-b1cc-97ceb2d344f5@bootlin.com>
Date: Fri, 23 Jan 2026 10:20:03 +0100
From: Maxime Chevallier <maxime.chevallier@...tlin.com>
To: Gregory CLEMENT <gregory.clement@...tlin.com>,
Rob Herring <robh@...nel.org>, Elad Nachman <enachman@...vell.com>,
andrew@...n.ch
Cc: conor+dt@...nel.org, linux-kernel@...r.kernel.org, robh+dt@...nel.org,
chris.packham@...iedtelesis.co.nz, pali@...nel.org,
devicetree@...r.kernel.org, mrkiko.rs@...il.com,
sebastian.hesselbarth@...il.com, linux-arm-kernel@...ts.infradead.org,
krzysztof.kozlowski+dt@...aro.org
Subject: Re: [PATCH 0/2] arm64: dts: a7k: add COM Express boards
Hi,
On 23/01/2026 10:10, Gregory CLEMENT wrote:
> Hello,
>
>> On Thu, 22 Jan 2026 18:59:20 +0200, Elad Nachman wrote:
>>> From: Elad Nachman <enachman@...vell.com>
>>>
>>> Add support for Armada 7020 Express Type 7 CPU module board by Marvell.
>>> Add device tree bindings for this board.
>>> Define this COM Express CPU module as dtsi and provide a dtsi file for
>>> the carrier board (Marvell DB-98CX85x0 COM Express type 7 carrier board).
>>> Add the Falcon DB to the MAINTAINERS list
>>>
>>> Since memory is soldered on CPU module, memory node is on CPU module
>>> dtsi file.
>>>
>>> This Carrier board only utilizes the PCIe link, hence no special device
>>> or driver support is provided by this dtsi file.
>>> Devise a dts file for the combined com express carrier and CPU module.
>>>
>>> The Aramda 7020 CPU COM Express board offers the following features:
>>>
>>> 1. Armada 7020 CPU, with dual ARM A72 cores
>>> 2. DDR4 memory, 8GB, on board soldered
>>> 3. 1Gbit Out of Band Ethernet via RGMII to PHY and RJ45 connector,
>>> all are present on A7K CPU module (none on the carrier)
>>> 4. Optional 10G KR Ethernet going via the COM Express type 7 connector
>>> 5. On-board 8 Gbit, 8-bit bus width NAND flash
>>> 6. On-board 512 Mbit SPI flash
>>> 7. PCIe Root Complex, 4 lanes PCIe gen3 connectivity, going via the
>>> COM Express type 7 connector
>>> 8. m.2 SATA connector
>>> 9. Micro-SD card connector
>>> 10. USB 2.0 via COM Express type 7 connector
>>> 11. Two i2c interfaces - one to the CPU module, and one to the
>>> carrier board via the COM Express type 7 connector
>>> 12. UART (mini USB connector by virtue of FT2232D UART to USB
>>> converter, connected to the Armada 7020 UART0)
>>>
[...]
>> My bot found new DTB warnings on the .dts files added or changed in this
>> series.
>>
>> Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
>> are fixed by another series. Ultimately, it is up to the platform
>> maintainer whether these warnings are acceptable or not. No need to reply
>> unless the platform maintainer has comments.
>>
>> If you already ran DT checks and didn't see these error(s), then
>> make sure dt-schema is up to date:
>>
>> pip3 install dtschema --upgrade
>>
>>
>> This patch series was applied (using b4) to base:
>> Base: attempting to guess base-commit...
>> Base: tags/next-20260121 (exact match)
>> Base: tags/next-20260121 (use --merge-base to override)
>>
>> If this is not the correct base, please add 'base-commit' tag
>> (or use b4 which does this automatically)
>>
>>
>> New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/marvell/' for 20260122165923.2316510-1-enachman@...vell.com:
>>
>> arch/arm64/boot/dts/marvell/db-falcon-carrier-a7k.dtb: ethernet@0 (marvell,armada-7k-pp22): ethernet-port@0:phy-mode:0: '10gbase-kr' is not one of ['gmii', 'sgmii', 'rgmii-id', '1000base-x', '2500base-x', '5gbase-r', 'rxaui', '10gbase-r']
>> from schema $id:
>> http://devicetree.org/schemas/net/marvell,pp2.yaml
>
> Does this mean we should add 10gbase-kr to the phy-mode enum list in
> Documentation/devicetree/bindings/net/marvell?
No, 10gbase-kr is legacy, one should use "10gbase-r" instead, cf commit
e0f909bc3a24 ("net: switch to using PHY_INTERFACE_MODE_10GBASER rather than 10GKR")
That should probably be documented in the bindings at some point :)
Maxime
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