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Message-ID: <176913270525.4027.13703640991573141787@lazor>
Date: Thu, 22 Jan 2026 18:45:05 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>, Chen-Yu Tsai <wenst@...omium.org>, Chia-I Wu <olvaffe@...il.com>, Dong Aisheng <aisheng.dong@....com>, Laura Nao <laura.nao@...labora.com>, Matthias Brugger <matthias.bgg@...il.com>, Michael Turquette <mturquette@...libre.com>, Nicolas Frattaroli <nicolas.frattaroli@...labora.com>, NĂcolas F. R. A. Prado <nfraprado@...labora.com>, Yassine Oudjana <y.oudjana@...tonmail.com>
Cc: kernel@...labora.com, linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org, Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
Subject: Re: [PATCH RESEND v3 5/5] clk: mediatek: Add mfg_eb as parent to mt8196 mfgpll clocks
Quoting Nicolas Frattaroli (2025-12-15 03:24:02)
> All the MFGPLL require MFG_EB to be on for any operation on them, and
> they only tick when MFG_EB is on as well, therefore making this a
> parent-child relationship.
>
> This dependency wasn't clear during the initial upstreaming of these
> clock controllers, as it only made itself known when I could observe
> the effects of the clock by bringing up a different piece of hardware.
>
> Add a new PLL_PARENT_EN flag to mediatek's clk-pll.h, and check for it
> when initialising the pll to then translate it into the actual
> CLK_OPS_PARENT_ENABLE flag.
>
> Then add the mfg_eb parent to the mfgpll clocks, and set the new
> PLL_PARENT_EN flag.
>
> Fixes: 03dc02f8c7dc ("clk: mediatek: Add MT8196 mfg clock support")
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
> ---
Applied to clk-next
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