linux-kernel - Re: [PATCH v4 03/12] dt-bindings: bus: document the stm32 debug bus

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Message-ID: <c66f60ef-851a-4037-8233-58f0bc3d2314@foss.st.com>
Date: Fri, 23 Jan 2026 11:27:07 +0100
From: Gatien CHEVALLIER <gatien.chevallier@...s.st.com>
To: Rob Herring <robh@...nel.org>
CC: Suzuki K Poulose <suzuki.poulose@....com>,
        Mike Leach
	<mike.leach@...aro.org>,
        James Clark <james.clark@...aro.org>,
        "Krzysztof
 Kozlowski" <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        "Mathieu
 Poirier" <mathieu.poirier@...aro.org>,
        Leo Yan <leo.yan@...ux.dev>,
        Clément Le Goffic <legoffic.clement@...il.com>,
        "Linus
 Walleij" <linusw@...nel.org>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Alexandre Torgue <alexandre.torgue@...s.st.com>,
        <jens.wiklander@...aro.org>, <coresight@...ts.linaro.org>,
        <linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-gpio@...r.kernel.org>,
        <linux-stm32@...md-mailman.stormreply.com>
Subject: Re: [PATCH v4 03/12] dt-bindings: bus: document the stm32 debug bus



On 1/23/26 00:21, Rob Herring wrote:
> On Thu, Jan 22, 2026 at 05:22:21PM +0100, Gatien CHEVALLIER wrote:
>>
>>
>> On 1/22/26 17:19, Gatien Chevallier wrote:
>>> Document the stm32 debug bus. The debug bus is responsible for
>>> checking the debug sub-system accessibility before probing any related
>>> drivers.
>>>
>>> Signed-off-by: Gatien Chevallier <gatien.chevallier@...s.st.com>
>>> ---
>>>    .../bindings/bus/st,stm32mp131-dbg-bus.yaml        | 77 ++++++++++++++++++++++
>>>    1 file changed, 77 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/bus/st,stm32mp131-dbg-bus.yaml b/Documentation/devicetree/bindings/bus/st,stm32mp131-dbg-bus.yaml
>>> new file mode 100644
>>> index 000000000000..57f01d301e75
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/bus/st,stm32mp131-dbg-bus.yaml
>>> @@ -0,0 +1,77 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/bus/st,stm32mp131-dbg-bus.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: STM32 Coresight bus
>>> +
>>> +maintainers:
>>> +  - Gatien Chevallier <gatien.chevallier@...s.st.com>
>>> +
>>> +description:
>>> +  The STM32 debug bus is in charge of checking the debug configuration
>>> +  of the platform before probing the peripheral drivers that rely on the debug
>>> +  domain.
>>> +
>>> +properties:
>>> +  compatible:
>>> +    items:
>>> +      - enum:
>>> +          - st,stm32mp131-dbg-bus
>>> +          - st,stm32mp151-dbg-bus
>>> +
>>> +  "#address-cells":
>>> +    const: 1
>>> +
>>> +  "#size-cells":
>>> +    const: 1
>>> +
>>> +  ranges: true
>>
>> Maybe maxItems:2 is preferred here, no?
> 
> Wouldn't it be 1 as there is only 1 range? Up to you whether you want to
> limit it or not.
> 

Hello Rob,

The Coresight STM on stm32mp15x platforms needs to access the stimulus
area, leading to the implementation of 2 ranges.

I'll change that for V5, I don't expect more ranges for these
peripherals.

>>
>>> +
>>> +  reg:
>>> +    maxItems: 1
> 
> Should be dropped?
> 

Yes, no point of keeping this.

>>> +
>>> +  "#access-controller-cells":
>>> +    const: 1
>>> +    description:
>>> +      Contains the debug profile necessary to access the peripheral.
>>> +
>>> +patternProperties:
>>> +  "^.*@[0-9a-f]+$":
> 
> This can be: "@[0-9a-f]+$"
> 
>>> +    description: Debug related peripherals
>>> +    type: object
>>> +
>>> +    additionalProperties: true
>>> +
>>> +    required:
>>> +      - access-controllers
>>> +
>>> +required:
>>> +  - "#access-controller-cells"
>>> +  - "#address-cells"
>>> +  - "#size-cells"
>>> +  - compatible
>>> +  - ranges
>>> +
>>> +additionalProperties: false
>>> +
>>> +examples:
>>> +  - |
>>> +    #include <dt-bindings/clock/stm32mp1-clks.h>
>>> +
>>> +    dbg_bus: bus@...80000 {
> 
> Drop unused labels.
> 

The "dbg_bus" label is used by the child node in the example.

I will remove the cs_cti_trace for the example.

>>> +      compatible = "st,stm32mp131-dbg-bus";
>>> +      #address-cells = <1>;
>>> +      #size-cells = <1>;
>>> +      #access-controller-cells = <1>;
>>> +      ranges = <0x50080000 0x50080000 0x3f80000>;
>>> +
>>> +      cs_cti_trace: cti@...94000 {
>>> +        compatible = "arm,coresight-cti", "arm,primecell";
>>> +        reg = <0x50094000 0x1000>;
>>> +        clocks = <&rcc CK_DBG>;
>>> +        clock-names = "apb_pclk";
>>> +        access-controllers = <&dbg_bus 0>;
>>> +      };
>>> +    };
>>>
>>

Thank you,
Gatien