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Message-Id: 
 <176924340785.3247175.17185864218197872186.git-patchwork-notify@kernel.org>
Date: Sat, 24 Jan 2026 08:30:07 +0000
From: patchwork-bot+linux-riscv@...nel.org
To: Sergey Matyukevich <geomatsi@...il.com>
Cc: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
 linux-kselftest@...r.kernel.org, pjw@...nel.org, palmer@...belt.com,
 alex@...ti.fr, oleg@...hat.com, shuah@...nel.org, thuth@...hat.com,
 charlie@...osinc.com, andybnac@...il.com, samuel.holland@...ive.com,
 joel.granados@...nel.org, conor.dooley@...rochip.com,
 yongxuan.wang@...ive.com, heiko@...ech.de, guoren@...nel.org
Subject: Re: [PATCH v5 0/9] riscv: vector: misc ptrace fixes for debug
 use-cases

Hello:

This series was applied to riscv/linux.git (for-next)
by Paul Walmsley <pjw@...nel.org>:

On Sun, 14 Dec 2025 19:35:04 +0300 you wrote:
> This patch series suggests fixes for several corner cases in the RISC-V
> vector ptrace implementation:
> 
> - init vector context with proper vlenb, to avoid reading zero vlenb
>   by an early attached debugger
> 
> - follow gdbserver expectations and return ENODATA instead of EINVAL
>   if vector extension is supported but not yet activated for the
>   traced process
> 
> [...]

Here is the summary with links:
  - [v5,1/9] riscv: ptrace: return ENODATA for inactive vector extension
    https://git.kernel.org/riscv/c/35328975fa84
  - [v5,2/9] riscv: vector: init vector context with proper vlenb
    https://git.kernel.org/riscv/c/66d52c54e59f
  - [v5,3/9] riscv: csr: define vtype register elements
    https://git.kernel.org/riscv/c/0d9acbd7836a
  - [v5,4/9] riscv: ptrace: validate input vector csr registers
    https://git.kernel.org/riscv/c/995e66a25b26
  - [v5,5/9] selftests: riscv: test ptrace vector interface
    https://git.kernel.org/riscv/c/dca68b94a8b1
  - [v5,6/9] selftests: riscv: verify initial vector state with ptrace
    https://git.kernel.org/riscv/c/1a353e49a0dc
  - [v5,7/9] selftests: riscv: verify syscalls discard vector context
    https://git.kernel.org/riscv/c/4b7e068fe676
  - [v5,8/9] selftests: riscv: verify ptrace rejects invalid vector csr inputs
    https://git.kernel.org/riscv/c/bfdd22c430ca
  - [v5,9/9] selftests: riscv: verify ptrace accepts valid vector csr values
    https://git.kernel.org/riscv/c/ccb3038e946c

You are awesome, thank you!
-- 
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