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Message-ID: <20260126033029.7923-3-baisheng.gao@unisoc.com>
Date: Mon, 26 Jan 2026 11:30:29 +0800
From: Baisheng Gao <baisheng.gao@...soc.com>
To: Robin Murphy <robin.murphy@....com>, Will Deacon <will@...nel.org>,
Mark
Rutland <mark.rutland@....com>, Rob Herring <robh@...nel.org>,
Krzysztof
Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
CC: <cixi.geng@...ux.dev>, <hao_hao.wang@...soc.com>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-perf-users@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<devicetree@...r.kernel.org>
Subject: [PATCH 2/2] dt-bindings/perf: Drop irqs for clock domains without a PMU instance
No need to specify the interrupts for the clock domains without a
PMU instance.
Signed-off-by: Baisheng Gao <baisheng.gao@...soc.com>
---
Documentation/devicetree/bindings/perf/arm,ni.yaml | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/perf/arm,ni.yaml b/Documentation/devicetree/bindings/perf/arm,ni.yaml
index d66fffa256d5..40a5b8929ef2 100644
--- a/Documentation/devicetree/bindings/perf/arm,ni.yaml
+++ b/Documentation/devicetree/bindings/perf/arm,ni.yaml
@@ -20,7 +20,8 @@ properties:
interrupts:
minItems: 1
maxItems: 32
- description: Overflow interrupts, one per clock domain, in order of domain ID
+ description: Overflow interrupts, one per clock domain which has a PMU
+ instance, in order of domain ID.
required:
- compatible
--
2.34.1
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