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Message-ID: <CAMuHMdWZKUjptQCqe_DK3C_g5d9Zhp3r3j6+dAfE1g==NH+ofw@mail.gmail.com>
Date: Mon, 26 Jan 2026 16:27:58 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Ovidiu Panait <ovidiu.panait.rb@...esas.com>
Cc: claudiu.beznea.uj@...renesas.com, alexandre.belloni@...tlin.com,
robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
magnus.damm@...il.com, mturquette@...libre.com, sboyd@...nel.org,
prabhakar.mahadev-lad.rj@...renesas.com, linux-rtc@...r.kernel.org,
linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH 1/5] clk: renesas: r9a09g056: Fix ordering of module
clocks array
On Sun, 25 Jan 2026 at 20:27, Ovidiu Panait
<ovidiu.panait.rb@...esas.com> wrote:
> The r9a09g056_mod_clks array is sorted by CPG_CLKON register number and
> bit position. Move the RSPI 0/1/2 module clock entries to their correct
> position to restore the array sort order.
>
> Fixes: 1f76689d1715 ("clk: renesas: r9a09g056: Add entries for RSCIs")
> Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@...esas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in renesas-clk for v6.21.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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