linux-kernel - Re: [PATCH RFT 3/3] arm64: dts: qcom: glymur-crd: Enable USB support

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Message-ID: <rqcvkrrfqil45wctqtjfmvublek3d33wkjvhogp4eymnwskzxj@nzu42jwjbmrw>
Date: Mon, 26 Jan 2026 19:52:39 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Abel Vesa <abel.vesa@....qualcomm.com>
Cc: Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Wesley Cheng <quic_wcheng@...cinc.com>,
        Pankaj Patil <pankaj.patil@....qualcomm.com>,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-usb@...r.kernel.org,
        Wesley Cheng <wesley.cheng@....qualcomm.com>
Subject: Re: [PATCH RFT 3/3] arm64: dts: qcom: glymur-crd: Enable USB support

On Mon, Jan 26, 2026 at 04:24:24PM +0200, Abel Vesa wrote:
> On 26-01-13 20:02:25, Dmitry Baryshkov wrote:
> > On Tue, Jan 13, 2026 at 02:33:06PM +0200, Abel Vesa wrote:
> > > From: Wesley Cheng <wesley.cheng@....qualcomm.com>
> > > 
> > > The Qualcomm Glymur Compute Reference Device comes with 3 Type-C ports,
> > > one USB Type-A, and a fingerprint reader connected over USB. Each of these
> > > 3 Type-C ports are connected to one of the USB combo PHYs and one of the
> > > M31 eUSB2 PHYs. The Type-A is connected to the USB Multi-port controller
> > > via one of the M31 eUSB2 PHYs and one combo PHY. The fingerprint reader
> > > is connected to the USB_2 controller. All M31 eUSB2 PHYs have associated
> > > eUSB2 to USB 2.0 repeaters, which are either part of SMB2360 PMICs or
> > > dedicated NXP PTN3222.
> > > 
> > > So enable all needed controllers, PHYs and repeaters, while describing
> > > their supplies. Also describe the PMIC glink graph for Type-C connectors.
> > > 
> > > Signed-off-by: Wesley Cheng <wesley.cheng@....qualcomm.com>
> > > Co-developed-by: Abel Vesa <abel.vesa@....qualcomm.com>
> > > Signed-off-by: Abel Vesa <abel.vesa@....qualcomm.com>
> > > ---
> > >  arch/arm64/boot/dts/qcom/glymur-crd.dts | 283 ++++++++++++++++++++++++++++++++
> > >  1 file changed, 283 insertions(+)
> > > 
> > > diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dts b/arch/arm64/boot/dts/qcom/glymur-crd.dts
> > > index 7c168e813f1e..3188bfa27bea 100644
> > > --- a/arch/arm64/boot/dts/qcom/glymur-crd.dts
> > > +++ b/arch/arm64/boot/dts/qcom/glymur-crd.dts
> > > @@ -56,6 +56,97 @@ key-volume-up {
> > >  		};
> > >  	};
> > >  
> > > +	pmic-glink {
> > > +		compatible = "qcom,glymur-pmic-glink";
> > > +		#address-cells = <1>;
> > > +		#size-cells = <0>;
> > 
> > No orientation-gpios?
> 
> Nope. Glymur does UCSI 2.x, so orientation comes via UCSI payload.

But is there a GPIO or not?

> 
> > 
> > > +
> > > @@ -858,3 +1015,129 @@ &pcie6_port0 {
> > >  	reset-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
> > >  	wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
> > >  };
> > > +
> > > +&usb1_ss0_qmpphy {
> > > +	vdda-phy-supply = <&vreg_l4h_e0_1p2>;
> > > +	vdda-pll-supply = <&vreg_l3f_e0_0p72>;
> > > +	refgen-supply = <&vreg_l2f_e0_0p82>;
> > > +
> > > +	status = "okay";
> > > +};
> > > +
> > > +&usb1_ss0_qmpphy_out {
> > > +	remote-endpoint = <&pmic_glink_ss_in>;
> > > +};
> > > +
> > > +&usb1_ss0_dwc3_hs {
> > > +	remote-endpoint = <&pmic_glink_hs_in>;
> > > +};
> > 
> > This is obviously not sorted. Please sort the nodes.
> 
> Will do.

-- 
With best wishes
Dmitry