linux-kernel - [PATCH V4 09/22] PCI: tegra194: Remove IRQF_ONESHOT flag during Endpoint interrupt registration

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Message-ID: <20260126074519.3426742-10-mmaddireddy@nvidia.com>
Date: Mon, 26 Jan 2026 13:15:06 +0530
From: Manikanta Maddireddy <mmaddireddy@...dia.com>
To: <bhelgaas@...gle.com>, <lpieralisi@...nel.org>, <kwilczynski@...nel.org>,
	<mani@...nel.org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
	<conor+dt@...nel.org>, <thierry.reding@...il.com>, <jonathanh@...dia.com>,
	<jingoohan1@...il.com>, <vidyas@...dia.com>, <cassel@...nel.org>,
	<18255117159@....com>
CC: <linux-pci@...r.kernel.org>, <devicetree@...r.kernel.org>,
	<linux-tegra@...r.kernel.org>, <linux-kernel@...r.kernel.org>, "Manikanta
 Maddireddy" <mmaddireddy@...dia.com>
Subject: [PATCH V4 09/22] PCI: tegra194: Remove IRQF_ONESHOT flag during Endpoint interrupt registration

From: Vidya Sagar <vidyas@...dia.com>

The Tegra PCIe Endpoint controller has a single interrupt line that is
shared between multiple interrupt sources:
1. PCIe link state events (link up, hot reset done)
2. Configuration space events (Bus Master Enable changes)
3. DMA completion events

Currently, the interrupt is registered with IRQF_ONESHOT, which keeps the
interrupt line masked until the threaded handler completes. This prevents
the DMA driver from sharing the same interrupt line, as the DMA completion
interrupts would be blocked while the threaded handler processes link state
events.

Removing IRQF_ONESHOT is safe for the following reasons:

1. The hard IRQ handler (tegra_pcie_ep_hard_irq) properly acknowledges and
   clears all interrupt status bits in hardware before returning. This
   prevents interrupt storms and ensures the interrupt controller can
   re-enable the interrupt line immediately.

2. The hard IRQ handler explicitly checks for DMA interrupts
   (APPL_INTR_STATUS_L1_8_0_EDMA_INT_MASK) and marks them as handled,
   allowing the DMA driver's handler to process them separately.

3. The threaded handler (tegra_pcie_ep_irq_thread) only processes link-up
   notifications and LTR message sending. These operations don't conflict
   with DMA interrupt processing and don't require the interrupt line to
   remain masked.

This change enables the DMA driver to share the interrupt line with the
PCIe endpoint driver, allowing both drivers to process their respective
events without blocking each other.

Signed-off-by: Vidya Sagar <vidyas@...dia.com>
Signed-off-by: Manikanta Maddireddy <mmaddireddy@...dia.com>
---
V4:
* Add more context to commit message.

V3:
* This is a new patch in this series

 drivers/pci/controller/dwc/pcie-tegra194.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index 40f9e1ab03c1..58f33e7bd5a8 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -2277,7 +2277,7 @@ static int tegra_pcie_dw_probe(struct platform_device *pdev)
 		ret = devm_request_threaded_irq(dev, pp->irq,
 						tegra_pcie_ep_hard_irq,
 						tegra_pcie_ep_irq_thread,
-						IRQF_SHARED | IRQF_ONESHOT,
+						IRQF_SHARED,
 						"tegra-pcie-ep-intr", pcie);
 		if (ret) {
 			dev_err(dev, "Failed to request IRQ %d: %d\n", pp->irq,
-- 
2.34.1