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Message-Id: <20260126-mxic-nand-v1-1-557df4a0dfa7@gmail.com>
Date: Mon, 26 Jan 2026 11:09:20 +0000
From: Akhila YS <akhilayalmati@...il.com>
To: Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>, Vignesh Raghavendra <vigneshr@...com>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-mtd@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Akhila YS <akhilayalmati@...il.com>
Subject: [PATCH] dt-bindings: mtd: mxic,multi-itfc-v009-nand-controller:
convert to DT schema
Convert Macronix Raw NAND Controller Device Tree binding to DT Schema.
Signed-off-by: Akhila YS <akhilayalmati@...il.com>
---
.../mtd/mxic,multi-itfc-v009-nand-controller.yaml | 79 ++++++++++++++++++++++
.../devicetree/bindings/mtd/mxic-nand.txt | 36 ----------
2 files changed, 79 insertions(+), 36 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/mxic,multi-itfc-v009-nand-controller.yaml b/Documentation/devicetree/bindings/mtd/mxic,multi-itfc-v009-nand-controller.yaml
new file mode 100644
index 000000000000..97baac8b405a
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/mxic,multi-itfc-v009-nand-controller.yaml
@@ -0,0 +1,79 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/mxic,multi-itfc-v009-nand-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Macronix Raw NAND Controller
+
+maintainers:
+ - Miquel Raynal <miquel.raynal@...tlin.com>
+ - Richard Weinberger <richard@....at>
+
+description:
+ The Macronix Multi-Interface Raw NAND Controller is a versatile flash
+ memory controller for embedding in SoCs, capable of interfacing with
+ various NAND devices. It requires dedicated clock inputs for core, data
+ transmit, and delayed transmit paths along with register space and an
+ interrupt line for operation.
+
+allOf:
+ - $ref: nand-controller.yaml#
+
+properties:
+ compatible:
+ const: mxic,multi-itfc-v009-nand-controller
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ clocks:
+ minItems: 3
+ maxItems: 3
+
+ clock-names:
+ items:
+ - const: ps
+ - const: send
+ - const: send_dly
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - "#address-cells"
+ - "#size-cells"
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ nand-controller@...30000 {
+ compatible = "mxic,multi-itfc-v009-nand-controller";
+ reg = <0x43c30000 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 0x1d IRQ_TYPE_EDGE_RISING>;
+ clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>;
+ clock-names = "ps", "send", "send_dly";
+
+ nand@0 {
+ reg = <0>;
+ nand-ecc-mode = "soft";
+ nand-ecc-algo = "bch";
+ };
+ };
+...
diff --git a/Documentation/devicetree/bindings/mtd/mxic-nand.txt b/Documentation/devicetree/bindings/mtd/mxic-nand.txt
deleted file mode 100644
index 46c55295a3e6..000000000000
--- a/Documentation/devicetree/bindings/mtd/mxic-nand.txt
+++ /dev/null
@@ -1,36 +0,0 @@
-Macronix Raw NAND Controller Device Tree Bindings
--------------------------------------------------
-
-Required properties:
-- compatible: should be "mxic,multi-itfc-v009-nand-controller"
-- reg: should contain 1 entry for the registers
-- #address-cells: should be set to 1
-- #size-cells: should be set to 0
-- interrupts: interrupt line connected to this raw NAND controller
-- clock-names: should contain "ps", "send" and "send_dly"
-- clocks: should contain 3 phandles for the "ps", "send" and
- "send_dly" clocks
-
-Children nodes:
-- children nodes represent the available NAND chips.
-
-See Documentation/devicetree/bindings/mtd/nand-controller.yaml
-for more details on generic bindings.
-
-Example:
-
- nand: nand-controller@...30000 {
- compatible = "mxic,multi-itfc-v009-nand-controller";
- reg = <0x43c30000 0x10000>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <GIC_SPI 0x1d IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>;
- clock-names = "send", "send_dly", "ps";
-
- nand@0 {
- reg = <0>;
- nand-ecc-mode = "soft";
- nand-ecc-algo = "bch";
- };
- };
---
base-commit: cc3aa43b44bdb43dfbac0fcb51c56594a11338a8
change-id: 20260122-mxic-nand-742183125e03
Best regards,
--
Akhila YS <akhilayalmati@...il.com>
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