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Message-ID: <aXdVCla1wV3sfcJd@devkitleo>
Date: Mon, 26 Jan 2026 11:50:35 +0000
From: Leonardo Bras <leo.bras@....com>
To: Tian Zheng <zhengtian10@...wei.com>
Cc: Leonardo Bras <leo.bras@....com>,
	Marc Zyngier <maz@...nel.org>,
	oliver.upton@...ux.dev,
	catalin.marinas@....com,
	corbet@....net,
	pbonzini@...hat.com,
	will@...nel.org,
	linux-kernel@...r.kernel.org,
	yuzenghui@...wei.com,
	wangzhou1@...ilicon.com,
	yezhenyu2@...wei.com,
	xiexiangyou@...wei.com,
	zhengchuan@...wei.com,
	joey.gouly@....com,
	kvmarm@...ts.linux.dev,
	kvm@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-doc@...r.kernel.org,
	suzuki.poulose@....com
Subject: Re: [PATCH v2 1/5] arm64/sysreg: Add HDBSS related register information

On Mon, Jan 26, 2026 at 10:21:42AM +0800, Tian Zheng wrote:
> 
> 
> On 1/22/2026 11:12 PM, Leonardo Bras wrote:
> > On Sat, Nov 22, 2025 at 12:40:27PM +0000, Marc Zyngier wrote:
> > > On Fri, 21 Nov 2025 09:23:38 +0000,
> > > Tian Zheng <zhengtian10@...wei.com> wrote:
> > > > 
> > > > From: eillon <yezhenyu2@...wei.com>
> > > > 
> > > > The ARM architecture added the HDBSS feature and descriptions of
> > > > related registers (HDBSSBR/HDBSSPROD) in the DDI0601(ID121123) version,
> > > > add them to Linux.
> > > > 
> > > > Signed-off-by: eillon <yezhenyu2@...wei.com>
> > > > Signed-off-by: Tian Zheng <zhengtian10@...wei.com>
> > > > ---
> > > >   arch/arm64/include/asm/esr.h     |  2 ++
> > > >   arch/arm64/include/asm/kvm_arm.h |  1 +
> > > >   arch/arm64/tools/sysreg          | 28 ++++++++++++++++++++++++++++
> > > >   3 files changed, 31 insertions(+)
> > > > 
> > > > diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h
> > > > index e1deed824464..a6f3cf0b9b86 100644
> > > > --- a/arch/arm64/include/asm/esr.h
> > > > +++ b/arch/arm64/include/asm/esr.h
> > > > @@ -159,6 +159,8 @@
> > > >   #define ESR_ELx_CM 		(UL(1) << ESR_ELx_CM_SHIFT)
> > > > 
> > > >   /* ISS2 field definitions for Data Aborts */
> > > > +#define ESR_ELx_HDBSSF_SHIFT	(11)
> > > > +#define ESR_ELx_HDBSSF		(UL(1) << ESR_ELx_HDBSSF_SHIFT)
> > > >   #define ESR_ELx_TnD_SHIFT	(10)
> > > >   #define ESR_ELx_TnD 		(UL(1) << ESR_ELx_TnD_SHIFT)
> > > >   #define ESR_ELx_TagAccess_SHIFT	(9)
> > > > diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
> > > > index 1da290aeedce..b71122680a03 100644
> > > > --- a/arch/arm64/include/asm/kvm_arm.h
> > > > +++ b/arch/arm64/include/asm/kvm_arm.h
> > > > @@ -124,6 +124,7 @@
> > > >   			 TCR_EL2_ORGN0_MASK | TCR_EL2_IRGN0_MASK)
> > > > 
> > > >   /* VTCR_EL2 Registers bits */
> > > > +#define VTCR_EL2_HDBSS		(1UL << 45)
> > > 
> > > I think it is time to convert VTCR_EL2 to the sysreg infrastructure
> > > instead of adding extra bits here.
> > 
> > 
> > Hi Marc, Tian,
> > 
> > Marc, IIUC the above was implemented by
> > https://lore.kernel.org/all/20251210173024.561160-1-maz@kernel.org
> > 
> > Which was recently applied to next, and it its way to mainstream.
> > 
> > Tian, I think it's worth rebasing this patchset on top of the above.
> > 
> 
> Indeed, I've been following Marc's VTCR_EL2 patch and will rebase my
> changes on top of it.
> 
> > BTW, I am working on using the feature enabled by this patchset on a new
> > optimization, so please include me on any new release.
> 
> Sure, I'll make sure you're on the Cc list for the next revision.

Thanks!


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