[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20260126115349.1750578-1-lukma@nabladev.com>
Date: Mon, 26 Jan 2026 12:53:49 +0100
From: Lukasz Majewski <lukma@...ladev.com>
To: Abel Vesa <abelvesa@...nel.org>,
Peng Fan <peng.fan@....com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>
Cc: Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
linux-clk@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
imx@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org,
Lukasz Majewski <lukma@...x.de>,
Lukasz Majewski <lukma@...ladev.com>
Subject: [PATCH v2] clk: vf610: Add support for the Ethernet switch clocks
From: Lukasz Majewski <lukma@...x.de>
The vf610 device has built in the MoreThanIP L2 switch. For proper
operation it is required to enable ESW and MAC table lookup clocks.
The MAC table spans from 0x400E_C000 for 0x4000 and it is necessary
to provide clocks for each AIPS1-"slot", which size is 0x1000
(hence four separate entries).
Those can be enabled via clock gating CCM_CCGR10 register (0x4006_B068).
This patch also adds VF610_CLK_ESW and VF610_CLK_ESW_MAC_TAB{0123}
macros definitions for L2 switch.
The VF610_CLK_END has been removed as its number had to be increased
when MTIP L2 switch clocks were added.
Signed-off-by: Lukasz Majewski <lukma@...ladev.com>
---
Changes for v2:
- Squash clock DT bindings to this single patch
- Replace VF610_CLK_END with VF610_CLK_ESW_MAC_TAB3 + 1
---
drivers/clk/imx/clk-vf610.c | 7 ++++++-
include/dt-bindings/clock/vf610-clock.h | 6 +++++-
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/imx/clk-vf610.c b/drivers/clk/imx/clk-vf610.c
index 9e11f1c7c397..e074442c12fd 100644
--- a/drivers/clk/imx/clk-vf610.c
+++ b/drivers/clk/imx/clk-vf610.c
@@ -110,7 +110,7 @@ static const struct clk_div_table pll4_audio_div_table[] = {
{ }
};
-static struct clk *clk[VF610_CLK_END];
+static struct clk *clk[VF610_CLK_ESW_MAC_TAB3 + 1];
static struct clk_onecell_data clk_data;
static u32 cscmr1;
@@ -309,6 +309,11 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
clk[VF610_CLK_ENET_TS] = imx_clk_gate("enet_ts", "enet_ts_sel", CCM_CSCDR1, 23);
clk[VF610_CLK_ENET0] = imx_clk_gate2("enet0", "ipg_bus", CCM_CCGR9, CCM_CCGRx_CGn(0));
clk[VF610_CLK_ENET1] = imx_clk_gate2("enet1", "ipg_bus", CCM_CCGR9, CCM_CCGRx_CGn(1));
+ clk[VF610_CLK_ESW] = imx_clk_gate2("esw", "ipg_bus", CCM_CCGR10, CCM_CCGRx_CGn(8));
+ clk[VF610_CLK_ESW_MAC_TAB0] = imx_clk_gate2("esw_tab0", "ipg_bus", CCM_CCGR10, CCM_CCGRx_CGn(12));
+ clk[VF610_CLK_ESW_MAC_TAB1] = imx_clk_gate2("esw_tab1", "ipg_bus", CCM_CCGR10, CCM_CCGRx_CGn(13));
+ clk[VF610_CLK_ESW_MAC_TAB2] = imx_clk_gate2("esw_tab2", "ipg_bus", CCM_CCGR10, CCM_CCGRx_CGn(14));
+ clk[VF610_CLK_ESW_MAC_TAB3] = imx_clk_gate2("esw_tab3", "ipg_bus", CCM_CCGR10, CCM_CCGRx_CGn(15));
clk[VF610_CLK_PIT] = imx_clk_gate2("pit", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(7));
diff --git a/include/dt-bindings/clock/vf610-clock.h b/include/dt-bindings/clock/vf610-clock.h
index 373644e46747..5d94bd561a2e 100644
--- a/include/dt-bindings/clock/vf610-clock.h
+++ b/include/dt-bindings/clock/vf610-clock.h
@@ -197,6 +197,10 @@
#define VF610_CLK_TCON1 188
#define VF610_CLK_CAAM 189
#define VF610_CLK_CRC 190
-#define VF610_CLK_END 191
+#define VF610_CLK_ESW 191
+#define VF610_CLK_ESW_MAC_TAB0 192
+#define VF610_CLK_ESW_MAC_TAB1 193
+#define VF610_CLK_ESW_MAC_TAB2 194
+#define VF610_CLK_ESW_MAC_TAB3 195
#endif /* __DT_BINDINGS_CLOCK_VF610_H */
--
2.39.5
Powered by blists - more mailing lists