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Message-Id: <20260126-ti-usb-v1-2-2855c129eb6d@gmail.com>
Date: Mon, 26 Jan 2026 13:22:05 +0000
From: Charan Pedumuru <charan.pedumuru@...il.com>
To: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Felipe Balbi <balbi@...com>
Cc: linux-usb@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Charan Pedumuru <charan.pedumuru@...il.com>
Subject: [PATCH 2/2] dt-bindings: usb: ti,dwc3: convert to DT schema
Convert OMAP DWC3 USB Glue Layer binding to DT schema.
Changes during conversion:
- Introduce a new compatible string pattern "omap_dwc3" to match nodes
already present in existing device tree sources.
Signed-off-by: Charan Pedumuru <charan.pedumuru@...il.com>
---
Documentation/devicetree/bindings/usb/omap-usb.txt | 80 ---------------
Documentation/devicetree/bindings/usb/ti,dwc3.yaml | 112 +++++++++++++++++++++
2 files changed, 112 insertions(+), 80 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/omap-usb.txt b/Documentation/devicetree/bindings/usb/omap-usb.txt
deleted file mode 100644
index f0dbc5ae45ae..000000000000
--- a/Documentation/devicetree/bindings/usb/omap-usb.txt
+++ /dev/null
@@ -1,80 +0,0 @@
-OMAP GLUE AND OTHER OMAP SPECIFIC COMPONENTS
-
-OMAP MUSB GLUE
- - compatible : Should be "ti,omap4-musb" or "ti,omap3-musb"
- - ti,hwmods : must be "usb_otg_hs"
- - multipoint : Should be "1" indicating the musb controller supports
- multipoint. This is a MUSB configuration-specific setting.
- - num-eps : Specifies the number of endpoints. This is also a
- MUSB configuration-specific setting. Should be set to "16"
- - ram-bits : Specifies the ram address size. Should be set to "12"
- - interface-type : This is a board specific setting to describe the type of
- interface between the controller and the phy. It should be "0" or "1"
- specifying ULPI and UTMI respectively.
- - mode : Should be "3" to represent OTG. "1" signifies HOST and "2"
- represents PERIPHERAL.
- - power : Should be "50". This signifies the controller can supply up to
- 100mA when operating in host mode.
- - usb-phy : the phandle for the PHY device
- - phys : the phandle for the PHY device (used by generic PHY framework)
- - phy-names : the names of the PHY corresponding to the PHYs present in the
- *phy* phandle.
-
-Optional properties:
- - ctrl-module : phandle of the control module this glue uses to write to
- mailbox
-
-SOC specific device node entry
-usb_otg_hs: usb_otg_hs@...ab000 {
- compatible = "ti,omap4-musb";
- ti,hwmods = "usb_otg_hs";
- multipoint = <1>;
- num-eps = <16>;
- ram-bits = <12>;
- ctrl-module = <&omap_control_usb>;
- phys = <&usb2_phy>;
- phy-names = "usb2-phy";
-};
-
-Board specific device node entry
-&usb_otg_hs {
- interface-type = <1>;
- mode = <3>;
- power = <50>;
-};
-
-OMAP DWC3 GLUE
- - compatible : Should be
- * "ti,dwc3" for OMAP5 and DRA7
- * "ti,am437x-dwc3" for AM437x
- - ti,hwmods : Should be "usb_otg_ss"
- - reg : Address and length of the register set for the device.
- - interrupts : The irq number of this device that is used to interrupt the
- MPU
- - #address-cells, #size-cells : Must be present if the device has sub-nodes
- - utmi-mode : controls the source of UTMI/PIPE status for VBUS and OTG ID.
- It should be set to "1" for HW mode and "2" for SW mode.
- - ranges: the child address space are mapped 1:1 onto the parent address space
-
-Optional Properties:
- - extcon : phandle for the extcon device omap dwc3 uses to detect
- connect/disconnect events.
- - vbus-supply : phandle to the regulator device tree node if needed.
-
-Sub-nodes:
-The dwc3 core should be added as subnode to omap dwc3 glue.
-- dwc3 :
- The binding details of dwc3 can be found in:
- Documentation/devicetree/bindings/usb/snps,dwc3.yaml
-
-omap_dwc3 {
- compatible = "ti,dwc3";
- ti,hwmods = "usb_otg_ss";
- reg = <0x4a020000 0x1ff>;
- interrupts = <0 93 4>;
- #address-cells = <1>;
- #size-cells = <1>;
- utmi-mode = <2>;
- ranges;
-};
-
diff --git a/Documentation/devicetree/bindings/usb/ti,dwc3.yaml b/Documentation/devicetree/bindings/usb/ti,dwc3.yaml
new file mode 100644
index 000000000000..859da4b1f207
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/ti,dwc3.yaml
@@ -0,0 +1,112 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/ti,dwc3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments OMAP DWC3 USB Glue Layer
+
+maintainers:
+ - Felipe Balbi <balbi@...com>
+
+description:
+ Texas Instruments glue layer for Synopsys DesignWare USB3 (DWC3)
+ controller on OMAP and AM43xx SoCs. Manages SoC-specific integration
+ including register mapping, interrupt routing, UTMI/PIPE interface mode
+ selection (HW/SW), and child DWC3 core instantiation via address space
+ translation. Supports both legacy single-instance and multi-instance
+ (numbered) configurations.
+
+properties:
+ $nodename:
+ pattern: "^omap_dwc3(_[0-9]+)?@.*$"
+
+ compatible:
+ enum:
+ - ti,dwc3
+ - ti,am437x-dwc3
+
+ ti,hwmods:
+ $ref: /schemas/types.yaml#/definitions/string
+ description:
+ TI PRCM hardware module name that must be enabled (powered and
+ clocked) for this node. "usb_otg_ss" refers to the SuperSpeed
+ (USB3 + USB2 OTG) controller wrapper/glue layer found in OMAP5,
+ DRA7, AM57x, and similar TI SoCs using DWC3.
+ const: usb_otg_ss
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ utmi-mode:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Controls the source of UTMI/PIPE status for VBUS and OTG ID.
+ 1 for HW mode, 2 for SW mode.
+ enum: [1, 2]
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ ranges: true
+
+ extcon:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Phandle for the extcon device used to detect connect/
+ disconnect events.
+
+ vbus-supply:
+ description: Phandle to the regulator device tree node if needed.
+
+patternProperties:
+ "^usb@[0-9a-f]+$":
+ type: object
+ $ref: snps,dwc3.yaml#
+ unevaluatedProperties: false
+
+required:
+ - reg
+ - compatible
+ - interrupts
+ - "#address-cells"
+ - "#size-cells"
+ - utmi-mode
+ - ranges
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ omap_dwc3_1@0 {
+ compatible = "ti,dwc3";
+ reg = <0x0 0x10000>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ utmi-mode = <2>;
+ ranges = <0 0 0x20000>;
+
+ usb@...00 {
+ compatible = "snps,dwc3";
+ reg = <0x10000 0x17000>;
+ interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "peripheral", "host", "otg";
+ phys = <&usb2_phy1>, <&usb3_phy1>;
+ phy-names = "usb2-phy", "usb3-phy";
+ maximum-speed = "super-speed";
+ dr_mode = "otg";
+ snps,dis_u3_susphy_quirk;
+ snps,dis_u2_susphy_quirk;
+ };
+ };
+...
--
2.52.0
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