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Message-ID: <d98f4778-38c6-412f-9b96-8e258cef0afd@oss.qualcomm.com>
Date: Mon, 26 Jan 2026 19:10:18 +0530
From: Raviteja Laggyshetty <raviteja.laggyshetty@....qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
Cc: Georgi Djakov <djakov@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
 <conor+dt@...nel.org>, linux-arm-msm@...r.kernel.org,
        linux-pm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Odelu Kukatla <odelu.kukatla@....qualcomm.com>
Subject: Re: [PATCH 2/2] interconnect: qcom: glymur: Add Mahua SoC support



On 1/26/2026 7:04 PM, Dmitry Baryshkov wrote:
> On Mon, Jan 26, 2026 at 06:40:13PM +0530, Raviteja Laggyshetty wrote:
>> On 1/23/2026 11:28 PM, Dmitry Baryshkov wrote:
>>> On Fri, Jan 23, 2026 at 05:12:36PM +0000, Raviteja Laggyshetty wrote:
>>>> +static int glymur_qnoc_probe(struct platform_device *pdev)
>>>> +{
>>>> +	if (device_is_compatible(&pdev->dev, "qcom,mahua-mc-virt")) {
>>>> +		llcc_mc.channels = 8;
>>>> +		ebi.channels = 8;
>>>> +	} else if (device_is_compatible(&pdev->dev, "qcom,mahua-hscnoc")) {
>>>> +		qns_llcc.channels = 8;
>>>> +		chm_apps.channels = 4;
>>>> +		qnm_pcie_west.buswidth = 32;
>>>> +	} else if (device_is_compatible(&pdev->dev, "qcom,mahua-pcie-west-anoc")) {
>>>> +		qns_pcie_west_mem_noc.buswidth = 32;
>>>> +	}
>>>
>>> Right here, set the node entries to NULL.
>>
>> cnoc_cfg_nodes is declared as an array of const pointers, so the pointer
>> values cannot be reassigned after initialization. To change the addresses,
>> the const qualifier would need to be dropped. To preserve const, the 
>> entire array has been duplicated instead by dropping the PCIE_3A related
>> nodes.
> 
> Why? Just drop the const instead of creating unnecessary (almost)
> duplication.
> 
ok, Thanks for the suggestion Dmitry, will post the next revision by 
addressing the comments.

>>>
>>>> +
> 


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