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Message-ID: <87ecnbb2mn.ffs@tglx>
Date: Tue, 27 Jan 2026 14:34:40 +0100
From: Thomas Gleixner <tglx@...nel.org>
To: Radu Rendec <rrendec@...hat.com>, Jon Hunter <jonathanh@...dia.com>,
Manivannan Sadhasivam <mani@...nel.org>
Cc: Daniel Tsai <danielsftsai@...gle.com>, Marek Behún
<kabel@...nel.org>,
Krishna Chaitanya Chundru <quic_krichai@...cinc.com>, Bjorn Helgaas
<bhelgaas@...gle.com>, Rob Herring <robh@...nel.org>, Krzysztof
Wilczyński <kwilczynski@...nel.org>, Lorenzo
Pieralisi <lpieralisi@...nel.org>, Jingoo Han <jingoohan1@...il.com>, Brian
Masney <bmasney@...hat.com>, Eric Chanudet <echanude@...hat.com>,
Alessandro Carminati <acarmina@...hat.com>, Jared Kangas
<jkangas@...hat.com>, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org, "linux-tegra@...r.kernel.org"
<linux-tegra@...r.kernel.org>
Subject: Re: [PATCH v3 3/3] PCI: dwc: Enable MSI affinity support
On Tue, Jan 27 2026 at 11:30, Thomas Gleixner wrote:
> The below untested hack should confirm that theory.
Actually looking at it deeper the solution is trivial because in this
case writing the MSI message to the device is not required when the
affinity changes because the message does not change. It is set once via
msi_domain_activate() and stays the same for the life time of the
interrupt.
So the below prevents the invocation of irq_chip_write_msi_msg() in
msi_domain_set_affinity(), but I would recommend to investigate the
actual underlying problem nevertheless:
It is going to roar its ugly head at some other place sooner than later
as there are tons of other places which guard against
pci_dev::current_state != PCI_D0.
Thanks,
tglx
---
--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -1495,7 +1495,7 @@ int irq_chip_redirect_set_affinity(struc
WRITE_ONCE(redir->target_cpu, cpumask_first(dest));
irq_data_update_effective_affinity(data, dest);
- return IRQ_SET_MASK_OK;
+ return IRQ_SET_MASK_OK_DONE;
}
EXPORT_SYMBOL_GPL(irq_chip_redirect_set_affinity);
#endif
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