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Message-Id: <20260127-rockchip-spdif-cleanup-and-bsp-sync-v1-7-a7c547072bbb@collabora.com>
Date: Tue, 27 Jan 2026 17:08:27 +0100
From: Sebastian Reichel <sebastian.reichel@...labora.com>
To: Liam Girdwood <lgirdwood@...il.com>, Mark Brown <broonie@...nel.org>,
Jaroslav Kysela <perex@...ex.cz>, Takashi Iwai <tiwai@...e.com>,
Heiko Stuebner <heiko@...ech.de>
Cc: Alexey Charkov <alchark@...il.com>,
Sjoerd Simons <sjoerd.simons@...labora.com>, linux-sound@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org,
linux-kernel@...r.kernel.org,
Sebastian Reichel <sebastian.reichel@...labora.com>,
Sugar Zhang <sugar.zhang@...k-chips.com>
Subject: [PATCH 07/10] ASoC: rockchip: spdif: Add support for set mclk rate
From: Sugar Zhang <sugar.zhang@...k-chips.com>
Allow setting the mclk rate from the machine driver.
Signed-off-by: Sugar Zhang <sugar.zhang@...k-chips.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@...labora.com>
---
sound/soc/rockchip/rockchip_spdif.c | 34 +++++++++++++++++++++++-----------
sound/soc/rockchip/rockchip_spdif.h | 2 +-
2 files changed, 24 insertions(+), 12 deletions(-)
diff --git a/sound/soc/rockchip/rockchip_spdif.c b/sound/soc/rockchip/rockchip_spdif.c
index 1a3b0a8e556c..8cf54470f931 100644
--- a/sound/soc/rockchip/rockchip_spdif.c
+++ b/sound/soc/rockchip/rockchip_spdif.c
@@ -86,12 +86,15 @@ static int rk_spdif_hw_params(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct rk_spdif_dev *spdif = snd_soc_dai_get_drvdata(dai);
+ unsigned int mclk_rate = clk_get_rate(spdif->mclk);
unsigned int val = SPDIF_CFGR_HALFWORD_ENABLE;
- int srate, mclk;
+ int bmc, div;
int ret;
- srate = params_rate(params);
- mclk = srate * 128;
+ /* bmc = 128fs */
+ bmc = 128 * params_rate(params);
+ div = DIV_ROUND_CLOSEST(mclk_rate, bmc);
+ val |= SPDIF_CFGR_CLK_DIV(div);
switch (params_format(params)) {
case SNDRV_PCM_FORMAT_S16_LE:
@@ -107,14 +110,6 @@ static int rk_spdif_hw_params(struct snd_pcm_substream *substream,
return -EINVAL;
}
- /* Set clock and calculate divider */
- ret = clk_set_rate(spdif->mclk, mclk);
- if (ret != 0) {
- dev_err(spdif->dev, "Failed to set module clock rate: %d\n",
- ret);
- return ret;
- }
-
ret = regmap_update_bits(spdif->regmap, SPDIF_CFGR,
SPDIF_CFGR_CLK_DIV_MASK |
SPDIF_CFGR_HALFWORD_ENABLE |
@@ -177,7 +172,24 @@ static int rk_spdif_dai_probe(struct snd_soc_dai *dai)
return 0;
}
+static int rk_spdif_set_sysclk(struct snd_soc_dai *dai,
+ int clk_id, unsigned int freq, int dir)
+{
+ struct rk_spdif_dev *spdif = snd_soc_dai_get_drvdata(dai);
+ int ret;
+
+ if (!freq)
+ return 0;
+
+ ret = clk_set_rate(spdif->mclk, freq);
+ if (ret)
+ dev_err(spdif->dev, "Failed to set mclk: %d\n", ret);
+
+ return ret;
+}
+
static const struct snd_soc_dai_ops rk_spdif_dai_ops = {
+ .set_sysclk = rk_spdif_set_sysclk,
.probe = rk_spdif_dai_probe,
.hw_params = rk_spdif_hw_params,
.trigger = rk_spdif_trigger,
diff --git a/sound/soc/rockchip/rockchip_spdif.h b/sound/soc/rockchip/rockchip_spdif.h
index d8be9aae5b19..fcc28b6c4f58 100644
--- a/sound/soc/rockchip/rockchip_spdif.h
+++ b/sound/soc/rockchip/rockchip_spdif.h
@@ -15,7 +15,7 @@
*/
#define SPDIF_CFGR_CLK_DIV_SHIFT (16)
#define SPDIF_CFGR_CLK_DIV_MASK (0xff << SPDIF_CFGR_CLK_DIV_SHIFT)
-#define SPDIF_CFGR_CLK_DIV(x) (x << SPDIF_CFGR_CLK_DIV_SHIFT)
+#define SPDIF_CFGR_CLK_DIV(x) ((x-1) << SPDIF_CFGR_CLK_DIV_SHIFT)
#define SPDIF_CFGR_HALFWORD_SHIFT 2
#define SPDIF_CFGR_HALFWORD_DISABLE (0 << SPDIF_CFGR_HALFWORD_SHIFT)
--
2.51.0
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