linux-kernel - Re: [PATCH net-next 1/3] dt-bindings: net: dsa: lantiq,gswip: reference common PHY properties

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Message-ID: <aXjmTMasMdE52Gfw@makrotopia.org>
Date: Tue, 27 Jan 2026 16:22:36 +0000
From: Daniel Golle <daniel@...rotopia.org>
To: Andrew Lunn <andrew@...n.ch>
Cc: Vladimir Oltean <olteanv@...il.com>, Hauke Mehrtens <hauke@...ke-m.de>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, netdev@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH net-next 1/3] dt-bindings: net: dsa: lantiq,gswip:
 reference common PHY properties

On Tue, Jan 27, 2026 at 04:21:26PM +0100, Andrew Lunn wrote:
> > > Is the PCS integrated into the port?
> > 
> > The PCS is hard-tied to port 4 of the switch. Neither can that port be
> > used for anything else than this PCS, nor can the PCS be used elsewhere.
> > It's a bit like they nuked one of the TP PHY ports and glued in that
> > SGMII PCS instead. The PCS is probably a ready-made IP block
> 
> Does it have IDs in register 2 and 3?

That'd be too easy ;)

register 2 is SGMII_PHY_MPLL_CFG2
register 3 is SGMII_PHY_RX0_CFG1

register 2 and 3 of the XAUI PHY which can be indirectly accessed also doesn't
contain anything meaningful (0x000a and 0x0000)

> Is there any clue if it is licensed from somebody?

At least it's not obvious in any way.

The documentation is public, see
https://www.maxlinear.com/product/interface/ethernet/ethernet-switches/gsw145
"Ethernet Switch GSW145 Data Sheet"
Section 4.2 SGMII_Registers

My guess that it is not genuinly designed for that switch IC stems from
the fact that it has features (EEE, for example) which aren't supported
in the way it is integrated in the switch.