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Message-ID: <CAL_Jsq+YYxWKaD-Xo7L3VUAJ=wvpbfW9GkKn0gcj3AOvMb=Uhg@mail.gmail.com>
Date: Tue, 27 Jan 2026 12:27:55 -0600
From: Rob Herring <robh@...nel.org>
To: Mohammad Rafi Shaik <mohammad.rafi.shaik@....qualcomm.com>
Cc: Bjorn Andersson <andersson@...nel.org>, Linus Walleij <linusw@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Srinivas Kandagatla <srini@...nel.org>, linux-arm-msm@...r.kernel.org,
linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3] dt-bindings: pinctrl: qcom,sm8450-lpass-lpi-pinctrl:
Add SA8775P and QCS8300 pinctrl
On Tue, Jan 27, 2026 at 12:13 PM Mohammad Rafi Shaik
<mohammad.rafi.shaik@....qualcomm.com> wrote:
>
>
>
> On 1/27/2026 7:47 PM, Rob Herring wrote:
> > On Tue, Jan 27, 2026 at 04:25:11PM +0530, Mohammad Rafi Shaik wrote:
> >> Document compatible for Qualcomm SA8775P and QCS8300 SoC LPASS TLMM
> >> pin controller, fully compatible with previous SM8450 generation
> >> (same amount of pins and functions).
> >>
> >> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@....qualcomm.com>
> >> ---
> >> changes in [v3]:
> >> - Removed the duplicate driver code patch as suggested by Krzysztof.
> >> - Reused the existing SM8490 pinctrl, which is fully compatible with SA8775P and QCS8300.
> >> - Link to V2: https://lore.kernel.org/all/20260107192007.500995-1-mohammad.rafi.shaik@oss.qualcomm.com/
> >>
> >> changes in [v2]:
> >> - Fixed dt-binding errors reported by Krzysztof and Rob.
> >> - Added proper slew rate value for wsa2_swr_data GPIO, as suggested by Konrad.
> >> - Documented Monaco compatible as suggested by Konrad.
> >> - Link to V1: https://lore.kernel.org/all/20251116171656.3105461-1-mohammad.rafi.shaik@oss.qualcomm.com/
> >> ---
> >> .../pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml | 10 +++++++++-
> >> 1 file changed, 9 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
> >> index e7565592d..354629c38 100644
> >> --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
> >> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
> >> @@ -15,7 +15,15 @@ description:
> >>
> >> properties:
> >> compatible:
> >> - const: qcom,sm8450-lpass-lpi-pinctrl
> >> + oneOf:
> >> + - const: qcom,sm8450-lpass-lpi-pinctrl
> >> + - items:
> >> + - enum:
> >> + - qcom,qcs8300-lpass-lpi-pinctrl
> >> + - qcom,sa8775p-lpass-lpi-pinctrl
> >> + - const: qcom,sm8450-lpass-lpi-pinctrl
> >> + minItems: 1
> >> + maxItems: 2
> >
> > No. You are either backwards compatible with sm8450 or you aren't. The
> > h/w is fixed.
> >
>
> ACK,
>
> Agree,
>
> Need backward compatibility with sm8450 for both sa8775p and qcs8300 as
> they must fall back to the sm8450, so initially used enum to pick
> between the sa8775p and qcs8300 compatibles. I see enum isn’t
> appropriate here since fixed h/w.
>
> will use the const instead of enum like below.
>
> properties:
> compatible:
> - const: qcom,sm8450-lpass-lpi-pinctrl
> + oneOf:
> + - const: qcom,sm8450-lpass-lpi-pinctrl
> + - items:
> + - const: qcom,sa8775p-lpass-lpi-pinctrl
> + - const: qcom,sm8450-lpass-lpi-pinctrl
> +
> + - items:
> + - const: qcom,qcs8300-lpass-lpi-pinctrl
> + - const: qcom,sm8450-lpass-lpi-pinctrl
Sigh, no. The 2 entries can be combined like you had. Just drop
minItems and maxItems from what you had.
And test your binding before sending it.
Rob
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