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Message-ID: <CAEev2e-p28J_H2oWdrtgGJ0Z=2iGn8FjFBN8ggU0t_Wtbi62rA@mail.gmail.com>
Date: Tue, 27 Jan 2026 17:39:33 -0600
From: Anirudh Srinivasan <asrinivasan@....tenstorrent.com>
To: Conor Dooley <conor@...nel.org>
Cc: Drew Fustini <dfustini@....tenstorrent.com>, Joel Stanley <jms@....tenstorrent.com>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>, linux-riscv@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-clk@...r.kernel.org, joel@....id.au, fustini@...nel.org, mpe@...nel.org,
mpe@....tenstorrent.com, npiggin@....tenstorrent.com, agross@...nel.org,
agross@....tenstorrent.com, bmasney@...hat.com
Subject: Re: [PATCH v3 1/3] dt-bindings: clk: tenstorrent: Add tenstorrent,atlantis-prcm
Hi Conor,
On Tue, Jan 27, 2026 at 1:58 PM Conor Dooley <conor@...nel.org> wrote:
>
> On Mon, Jan 26, 2026 at 03:07:14PM -0600, Anirudh Srinivasan wrote:
> > Document bindings for Tenstorrent Atlantis PRCM that manages clocks
> > and resets. This block is instantiated 4 times in the SoC.
> > This commit documents the clocks from the RCPU PRCM block.
> >
> > Signed-off-by: Anirudh Srinivasan <asrinivasan@....tenstorrent.com>
> > ---
> > .../bindings/clock/tenstorrent,atlantis-prcm.yaml | 82 ++++++++++++++++
> > MAINTAINERS | 2 +
> > .../dt-bindings/clock/tenstorrent,atlantis-prcm.h | 103 +++++++++++++++++++++
> > 3 files changed, 187 insertions(+)
> >
> > +
> > + tenstorrent,prcm-rcpu:
> > + $ref: /schemas/types.yaml#/definitions/phandle
> > + description:
> > + Phandle reference to RCPU prcm, needed by other 3 prcms (PCIe, MM, HSIO)
> > + as the control registers for the PLLs that drive these subsystems are in
> > + RCPU prcm's range
>
> This is pretty suspect sounding, if the PLLs for !rcpu are controlled in
> the rcpu register region, why is it not a clock parent for the !rcpu
> prcms?
I saw another clock driver doing it in the manner I did [1], and
thought that it would make writing the bindings and the clock driver
simpler. Each prcm node would have a single input clock (otherwise
there would be a differing number of input clocks for each prcm node).
This would also avoid having the clock tree in the driver contain
multiple entries for some of the PLLs (one in the rcpu subsystem where
it is defined and another where the same clock is referred with {
.index = 0 }) which could become confusing.
What would you suggest that I do?
[1] https://elixir.bootlin.com/linux/v6.18.2/source/Documentation/devicetree/bindings/clock/spacemit,k1-pll.yaml#L22
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