| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID:
<AM9PR04MB8353216F2312DA5097106B8CE390A@AM9PR04MB8353.eurprd04.prod.outlook.com>
Date: Tue, 27 Jan 2026 04:27:03 +0000
From: Chancel Liu <chancel.liu@....com>
To: Laurentiu Mihalcea <laurentiumihalcea111@...il.com>, Liam Girdwood
<lgirdwood@...il.com>, Mark Brown <broonie@...nel.org>, Rob Herring
<robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>, Sascha Hauer
<s.hauer@...gutronix.de>, Fabio Estevam <festevam@...il.com>, "S.J. Wang"
<shengjiu.wang@....com>, Frank Li <frank.li@....com>
CC: "linux-sound@...r.kernel.org" <linux-sound@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"imx@...ts.linux.dev" <imx@...ts.linux.dev>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>, Pengutronix Kernel Team
<kernel@...gutronix.de>
Subject: RE: [EXT] [PATCH v2 2/2] arm64: dts: imx95-15x15-frdm: support AONMIX
MQS
> From: Laurentiu Mihalcea <laurentiu.mihalcea@....com>
>
> Add support for AONMIX MQS (i.e. MQS1).
>
> Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@....com>
Reviewed-by: Chancel Liu <chancel.liu@....com>
Regards,
Chancel Liu
> ---
> .../boot/dts/freescale/imx95-15x15-frdm.dts | 73 +++++++++++++++++++
> arch/arm64/boot/dts/freescale/imx95.dtsi | 5 ++
> 2 files changed, 78 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts
> b/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts
> index ca1c4966c867..0f43e3be7058 100644
> --- a/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts
> +++ b/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts
> @@ -243,6 +243,12 @@ codec {
> };
> };
>
> + sound-mqs {
> + compatible = "audio-graph-card2";
> + links = <&sai1_port1>;
> + label = "mqs-audio";
> + };
> +
> usdhc3_pwrseq: usdhc3-pwrseq {
> compatible = "mmc-pwrseq-simple";
> reset-gpios = <&pcal6524 8 GPIO_ACTIVE_LOW>; @@ -473,6 +479,21
> @@ &mu7 {
> status = "okay";
> };
>
> +&mqs1 {
> + clocks = <&scmi_clk IMX95_CLK_SAI1>;
> + clock-names = "mclk";
> + pinctrl-0 = <&pinctrl_mqs1>;
> + pinctrl-names = "default";
> + status = "okay";
> +
> + mqs1_port: port {
> + mqs1_ep: endpoint {
> + dai-format = "left_j";
> + remote-endpoint = <&sai1_port1_ep>;
> + };
> + };
> +};
> +
> &netc_blk_ctrl {
> status = "okay";
> };
> @@ -534,6 +555,51 @@ &pcie0 {
> status = "okay";
> };
>
> +&sai1 {
> + clocks = <&scmi_clk IMX95_CLK_BUSAON>, <&dummy>,
> + <&scmi_clk IMX95_CLK_SAI1>, <&dummy>,
> + <&dummy>, <&scmi_clk IMX95_CLK_AUDIOPLL1>,
> + <&scmi_clk IMX95_CLK_AUDIOPLL2>;
> + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k";
> + assigned-clocks = <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>,
> + <&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>,
> + <&scmi_clk IMX95_CLK_AUDIOPLL1>,
> + <&scmi_clk IMX95_CLK_AUDIOPLL2>,
> + <&scmi_clk IMX95_CLK_SAI1>;
> + assigned-clock-parents = <0>, <0>, <0>, <0>, <&scmi_clk
> IMX95_CLK_AUDIOPLL1>;
> + assigned-clock-rates = <3932160000>, <3612672000>,
> + <393216000>, <361267200>,
> + <24576000>;
> + fsl,sai-mclk-direction-output;
> + status = "okay";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + /* leave unconnected - no RX in the context of MQS */
> + port@0 {
> + reg = <0>;
> +
> + endpoint {
> + };
> + };
> +
> + sai1_port1: port@1 {
> + reg = <1>;
> + mclk-fs = <512>;
> +
> + sai1_port1_ep: endpoint {
> + dai-format = "left_j";
> + system-clock-direction-out;
> + bitclock-master;
> + frame-master;
> + remote-endpoint = <&mqs1_ep>;
> + };
> + };
> + };
> +};
> +
> &scmi_iomuxc {
> pinctrl_emdio: emdiogrp {
> fsl,pins = <
> @@ -618,6 +684,13 @@ IMX95_PAD_GPIO_IO31__LPI2C4_SCL
> 0x40000b9e
> >;
> };
>
> + pinctrl_mqs1: mqs1grp {
> + fsl,pins = <
> + IMX95_PAD_SAI1_TXFS__AONMIX_TOP_MQS1_LEFT
> 0x31e
> + IMX95_PAD_SAI1_RXD0__AONMIX_TOP_MQS1_RIGHT
> 0x31e
> + >;
> + };
> +
> pinctrl_pcal6524: pcal6524grp {
> fsl,pins = <
> IMX95_PAD_GPIO_IO34__GPIO5_IO_BIT14 0x31e
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi
> b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index 55e2da094c88..0c55861d673c 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -391,6 +391,11 @@ scmi_misc: protocol@84 {
> };
> };
>
> + mqs1: mqs-1 {
> + compatible = "fsl,imx95-aonmix-mqs";
> + status = "disabled";
> + };
> +
> pmu {
> compatible = "arm,cortex-a55-pmu";
> interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(6) |
> IRQ_TYPE_LEVEL_HIGH)>;
> --
> 2.43.0
Powered by blists - more mailing lists