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Message-ID: <CAD++jLnKeY8SW7Vq7N4_Y=xcKChZdqEZbB8MFfFVbYgA9+hvVA@mail.gmail.com>
Date: Tue, 27 Jan 2026 10:04:30 +0100
From: Linus Walleij <linusw@...nel.org>
To: Jens Emil Schulz Østergaard <jensemil.schulzostergaard@...rochip.com>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Alexandre Belloni <alexandre.belloni@...tlin.com>,
Lars Povlsen <lars.povlsen@...rochip.com>, Bartosz Golaszewski <brgl@...nel.org>,
Steen Hegelund <Steen.Hegelund@...rochip.com>, Daniel Machon <daniel.machon@...rochip.com>,
linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/3] pinctrl: ocelot: Extend pinctrl-ocelot driver for lan9645x
On Mon, Jan 19, 2026 at 4:07 PM Jens Emil Schulz Østergaard
<jensemil.schulzostergaard@...rochip.com> wrote:
> LAN9645x is a switch chip family with several on-chip peripherals, such as
> a GPIO controller. The LAN9645xF subfamily has 3 SKUs with the difference
> being number of supported ports. There are 5, 7 and 9 ported SKUs.
>
> The LAN9645xF family come in a VQFN-DR package and supports 51 GPIOs, and
> up to 7 alternate modes per pin.
>
> Due to the way this GPIO controller modifies alternate modes on a pin, this
> means the usual pin stride is 2, but the alternate mode stride is 3. This
> is the first device supported by pinctrl-ocelot where these two numbers
> are not equal. As a consequence the register address calculation in the
> REG_ALT macro is generalized to handle this.
>
> Signed-off-by: Jens Emil Schulz Østergaard <jensemil.schulzostergaard@...rochip.com>
Patch applied!
Yours,
Linus Walleij
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