linux-kernel - Re: [RFC PATCH] net: phy: integrate reset-after-clock quirk into phy_init

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Message-ID: <CAOf5uwm30=AVhqm67yz8Y5TkX9FWdxizTevCGSeaQuJS0KqtNA@mail.gmail.com>
Date: Wed, 28 Jan 2026 14:33:24 +0100
From: Michael Nazzareno Trimarchi <michael@...rulasolutions.com>
To: Andrew Lunn <andrew@...n.ch>
Cc: Wei Fang <wei.fang@....com>, Shenwei Wang <shenwei.wang@....com>, 
	Clark Wang <xiaoning.wang@....com>, Andrew Lunn <andrew+netdev@...n.ch>, 
	"David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, 
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, 
	Heiner Kallweit <hkallweit1@...il.com>, Russell King <linux@...linux.org.uk>, 
	"open list:FREESCALE IMX / MXC FEC DRIVER" <imx@...ts.linux.dev>, 
	"open list:FREESCALE IMX / MXC FEC DRIVER" <netdev@...r.kernel.org>, open list <linux-kernel@...r.kernel.org>
Subject: Re: [RFC PATCH] net: phy: integrate reset-after-clock quirk into phy_init_hw

Hi Andrew

On Wed, Jan 28, 2026 at 2:25 PM Andrew Lunn <andrew@...n.ch> wrote:
>
> On Wed, Jan 28, 2026 at 10:46:41AM +0100, Michael Trimarchi wrote:
> > The current implementation of phy_reset_after_clk_enable requires MAC drivers
> > (like fec_main.c) to manually track PHY probing states and trigger resets
> > at specific points in their clock management flow and was created just for a SoC
> > vendor.
>
> We try to keep workarounds for specific SoC vendors out of the core,
> when possible. It just makes the core more complex for an edge case
> which most people don't care about. It is better to hide the
> complexity away in the driver which needs it.

We should not merge things in the core that are for one Soc and
after d65af21842f8a7821fc3b28dc043c2f92b2b312c, I need to anyway to do:

net: phy: smsc: Fix functionality of lan8710 in combination with NXP fec

Revert "net: phy: smsc: LAN8710/20: remove PHY_RST_AFTER_CLK_EN flag"
d65af21842

The way the reset is sent using phy library is not compatible with
the phy reset logic. For now we need to revert this patch to all
the phy to go back working

Change-Id: Ic1b0fde04188c7cbfd8c94f9fa1a26d058e07d1d
Signed-off-by: Michael Trimarchi <michael@...rulasolutions.com>

>
> > This leads to fragile code in the Ethernet driver, involving complex
> > checks to see if the PHY device is bound.
>
> Have you found an actual issue with the code in the driver?

Yes, and I think that the flag should be used properly in the state
machine of the phy and not
in the fec. Is possible that is the only one SoC has this problem?

Michael

>
>      Andrew



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Michael Nazzareno Trimarchi
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michael@...rulasolutions.com
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