linux-kernel - [PATCH 4/4] LoongArch: KVM: Add register LOONGARCH_CSR

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Message-Id: <20260128030326.3377462-5-maobibo@loongson.cn>
Date: Wed, 28 Jan 2026 11:03:26 +0800
From: Bibo Mao <maobibo@...ngson.cn>
To: Huacai Chen <chenhuacai@...nel.org>,
	WANG Xuerui <kernel@...0n.name>,
	Tianrui Zhao <zhaotianrui@...ngson.cn>
Cc: loongarch@...ts.linux.dev,
	linux-kernel@...r.kernel.org,
	kvm@...r.kernel.org
Subject: [PATCH 4/4] LoongArch: KVM: Add register LOONGARCH_CSR_IPR during vCPU context switch

Register LOONGARCH_CSR_IPR is interrupt priority setting for nested
interrupt handling. Though LoongArch Linux avec driver does not use
this register, however KVM hypervisor needs need save or restore this
register during vCPU context switch, Linux avec driver may use this
register in future or other OS may use it.

Signed-off-by: Bibo Mao <maobibo@...ngson.cn>
---
 arch/loongarch/kvm/vcpu.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/loongarch/kvm/vcpu.c b/arch/loongarch/kvm/vcpu.c
index 6d9953d0b7be..b224df0f6d0a 100644
--- a/arch/loongarch/kvm/vcpu.c
+++ b/arch/loongarch/kvm/vcpu.c
@@ -1666,6 +1666,7 @@ static int _kvm_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 		kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_ISR1);
 		kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_ISR2);
 		kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_ISR3);
+		kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_IPR);
 	}
 
 	/* Restore Root.GINTC from unused Guest.GINTC register */
@@ -1761,6 +1762,7 @@ static int _kvm_vcpu_put(struct kvm_vcpu *vcpu, int cpu)
 		kvm_save_hw_gcsr(csr, LOONGARCH_CSR_ISR1);
 		kvm_save_hw_gcsr(csr, LOONGARCH_CSR_ISR2);
 		kvm_save_hw_gcsr(csr, LOONGARCH_CSR_ISR3);
+		kvm_save_hw_gcsr(csr, LOONGARCH_CSR_IPR);
 	}
 
 	vcpu->arch.aux_inuse |= KVM_LARCH_SWCSR_LATEST;
-- 
2.39.3