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Message-Id: <20260128-ssqosid-cbqri-v2-14-dca586b091b9@kernel.org>
Date: Wed, 28 Jan 2026 12:27:35 -0800
From: Drew Fustini <fustini@...nel.org>
To: Paul Walmsley <pjw@...nel.org>, Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>,
Radim Krčmář <rkrcmar@...tanamicro.com>,
Samuel Holland <samuel.holland@...ive.com>,
Adrien Ricciardi <aricciardi@...libre.com>,
Nicolas Pitre <npitre@...libre.com>,
Kornel Dulęba <mindal@...ihalf.com>,
Atish Patra <atish.patra@...ux.dev>,
Atish Kumar Patra <atishp@...osinc.com>,
Vasudevan Srinivasan <vasu@...osinc.com>, Ved Shanbhogue <ved@...osinc.com>,
yunhui cui <cuiyunhui@...edance.com>, Chen Pei <cp0613@...ux.alibaba.com>,
Liu Zhiwei <zhiwei_liu@...ux.alibaba.com>, Weiwei Li <liwei1518@...il.com>,
guo.wenjia23@....com.cn, liu.qingtao2@....com.cn,
Reinette Chatre <reinette.chatre@...el.com>,
Tony Luck <tony.luck@...el.com>, Babu Moger <babu.moger@....com>,
Peter Newman <peternewman@...gle.com>, Fenghua Yu <fenghua.yu@...el.com>,
James Morse <james.morse@....com>, Ben Horgan <ben.horgan@....com>,
Dave Martin <Dave.Martin@....com>, Drew Fustini <fustini@...nel.org>,
linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
x86@...nel.org, Rob Herring <robh@...nel.org>,
"Rafael J. Wysocki" <rafael@...nel.org>, Len Brown <lenb@...nel.org>,
Robert Moore <robert.moore@...el.com>, Sunil V L <sunilvl@...tanamicro.com>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: Paul Walmsley <paul.walmsley@...ive.com>, linux-acpi@...r.kernel.org,
acpica-devel@...ts.linux.dev, devicetree@...r.kernel.org
Subject: [PATCH RFC v2 14/17] include: acpi: actbl2: Add structs for RQSC
table
Add structs for the RQSC table which describes the properties of the
RISC-V QoS controllers (CBQRI) in the system. The table also describes
the topological arrangement of the QoS controllers and resources in the
system. The topology is expressed in terms of the location of the
resources within the system and the relation between the QoS Controller
and the resource it manages.
Link: https://github.com/riscv-non-isa/riscv-cbqri/releases/tag/v1.0
Link: https://github.com/riscv-non-isa/riscv-rqsc/blob/main/src/chapter2.adoc
Signed-off-by: Drew Fustini <fustini@...nel.org>
---
include/acpi/actbl2.h | 92 +++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 92 insertions(+)
diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h
index f726bce3eb84..7367990349ee 100644
--- a/include/acpi/actbl2.h
+++ b/include/acpi/actbl2.h
@@ -53,6 +53,7 @@
#define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */
#define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */
#define ACPI_SIG_RIMT "RIMT" /* RISC-V IO Mapping Table */
+#define ACPI_SIG_RQSC "RQSC" /* RISC-V RISC-V Quality of Service Controller */
#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
@@ -3165,6 +3166,97 @@ enum acpi_rgrt_image_type {
ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */
};
+/*******************************************************************************
+ *
+ * RQSC - RISC-V Quality of Service Controller
+ * Version 1
+ *
+ ******************************************************************************/
+
+struct acpi_table_rqsc_fields_res {
+ u8 type; // 1
+ u8 resv; // 1
+ u16 length; // 2
+ u16 flags; // 2
+ u8 resv2; // 1
+ u8 id_type; // 1
+ u64 id1; // 8
+ u32 id2; // 4
+};
+
+struct acpi_table_rqsc_fields {
+ u8 type; // 1
+ u8 resv; // 1
+ u16 length; // 2
+ u32 reg[3]; // 12
+ u32 rcid; // 4
+ u32 mcid; // 4
+ u16 flags; // 2
+ u16 nres; // 2
+ struct acpi_table_rqsc_fields_res res; // 20
+};
+
+struct acpi_table_rqsc {
+ struct acpi_table_header header; /* Common ACPI table header */
+ u32 num;
+ struct acpi_table_rqsc_fields f[6];
+};
+
+/* RQSC Flags */
+#define ACPI_RQSC_TIMER_CANNOT_WAKEUP_CPU (1)
+
+/*
+ * RQSC subtables
+ */
+struct acpi_rqsc_node_header {
+ u16 type;
+ u16 length;
+ u16 revision;
+};
+
+/* Values for RQSC subtable Type above */
+enum acpi_rqsc_node_type {
+ ACPI_RQSC_NODE_TYPE_ISA_STRING = 0x0000,
+ ACPI_RQSC_NODE_TYPE_CMO = 0x0001,
+ ACPI_RQSC_NODE_TYPE_MMU = 0x0002,
+ ACPI_RQSC_NODE_TYPE_RESERVED = 0x0003,
+ ACPI_RQSC_NODE_TYPE_HART_INFO = 0xFFFF,
+};
+
+/*
+ * RQSC node specific subtables
+ */
+
+/* ISA string node structure */
+struct acpi_rqsc_isa_string {
+ u16 isa_length;
+ char isa[];
+};
+
+struct acpi_rqsc_cmo_node {
+ u8 reserved; /* Must be zero */
+ u8 cbom_size; /* CBOM size in powerof 2 */
+ u8 cbop_size; /* CBOP size in powerof 2 */
+ u8 cboz_size; /* CBOZ size in powerof 2 */
+};
+
+struct acpi_rqsc_mmu_node {
+ u8 reserved; /* Must be zero */
+ u8 mmu_type; /* Virtual Address Scheme */
+};
+
+enum acpi_rqsc_mmu_type {
+ ACPI_RQSC_MMU_TYPE_SV39 = 0,
+ ACPI_RQSC_MMU_TYPE_SV48 = 1,
+ ACPI__MMU_TYPE_SV57 = 2
+};
+
+/* Hart Info node structure */
+struct acpi_rqsc_hart_info {
+ u16 num_offsets;
+ u32 uid; /* ACPI processor UID */
+};
+
/*******************************************************************************
*
* RHCT - RISC-V Hart Capabilities Table
--
2.43.0
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