Message-ID: <20260128-palpable-varmint-00bfd7603786@spud>
Date: Wed, 28 Jan 2026 20:33:13 +0000
From: Conor Dooley <conor@...nel.org>
To: soc@...nel.org
Cc: conor@...nel.org, linux-riscv@...ts.infradead.org,
	linux-kernel@...r.kernel.org
Subject: [GIT PULL] RISC-V Devicetrees for v6.20 (or v7.0?)

Hey folks,

Not a very big PR from me this time either. Last windows I've been
expecting my PR to contain the Canaan k230 platform but the clock
driver that I am waiting on always seems to end up not being quite
ready ¯\_(ツ)_/¯

Cheers,
Conor.

The following changes since commit 8f0b4cce4481fb22653697cced8d0d04027cb1e8:

  Linux 6.19-rc1 (2025-12-14 16:05:07 +1200)

are available in the Git repository at:

  https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ riscv-dt-for-v6.20

for you to fetch changes up to 18649ffbb63bca40896f973b6997914f9d603b1e:

  riscv: dts: anlogic: dr1v90: Add "b" ISA extension (2026-01-19 09:58:30 +0000)

----------------------------------------------------------------
RISC-V Devicetrees for v6.20 (or v7.0)

Anlogic:
Minor change to the extension information, to add the "b" extension
that's a catch-all for 3 of the extensions already in the dts.

Starfive:
Append the jh7110 compatible to jh7110s devicetrees, as that will enable
OpenSBI etc to run without adding support for this minor variant. The
"s" device differs from the non "s" device only in
thermal limits and voltage/frequency characteristics.

Microchip:
Redo the mpfs clock setup yet again, to something approaching correct.
The original binding conjured up for the platform was wildly inaccurate,
and even with the original improvements, a bigger change to using
syscons was required to support several peripherals that also inhabit
the memory regions that the clocks lie in. The damage to the dts isn't
that bad in the end, and of course the whole thing has been done in a
backwards compatible manner, with the code changes being merged a cycle
or two ago in the kernel and like a year ago in U-Boot (the only other
user that I am aware of).

Generic:
Additions to extensions.yaml, mainly for things in the "rva23" profile
that appear for the first time on the Spacemit K3 SoC.

Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>

----------------------------------------------------------------
Conor Dooley (2):
      riscv: dts: microchip: fix mailbox description
      riscv: dts: microchip: convert clock and reset to use syscon

E Shattow (3):
      dt-bindings: riscv: starfive: Append JH-7110 SoC compatible to VisionFive 2 Lite board
      riscv: dts: starfive: Append JH-7110 SoC compatible to VisionFive 2 Lite board
      riscv: dts: starfive: Append JH-7110 SoC compatible to VisionFive 2 Lite eMMC board

Guodong Xu (6):
      dt-bindings: riscv: update ratified version of h, svinval, svnapot, svpbmt
      dt-bindings: riscv: Add B ISA extension description
      dt-bindings: riscv: Add descriptions for Za64rs, Ziccamoa, Ziccif, and Zicclsm
      dt-bindings: riscv: Add Ssccptr, Sscounterenw, Sstvala, Sstvecd, Ssu64xl
      dt-bindings: riscv: Add Sha and its comprised extensions
      riscv: dts: anlogic: dr1v90: Add "b" ISA extension

Rob Herring (Arm) (1):
      dt-bindings: riscv: extensions: Drop unnecessary select schema

 .../devicetree/bindings/riscv/extensions.yaml      | 194 +++++++++++++++++++--
 .../devicetree/bindings/riscv/starfive.yaml        |   1 +
 arch/riscv/boot/dts/anlogic/dr1v90.dtsi            |   5 +-
 arch/riscv/boot/dts/microchip/mpfs.dtsi            |  34 ++--
 .../jh7110-starfive-visionfive-2-lite-emmc.dts     |   2 +-
 .../starfive/jh7110-starfive-visionfive-2-lite.dts |   2 +-
 6 files changed, 210 insertions(+), 28 deletions(-)

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