linux-kernel - Re: [RFC PATCH] net: phy: integrate reset-after-clock quirk into phy_init

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Message-ID: <CAOf5uwmzRfB-8qJPtgoCjV++TTTBawvifhuw_x08f=ehw6Rknw@mail.gmail.com>
Date: Wed, 28 Jan 2026 22:20:53 +0100
From: Michael Nazzareno Trimarchi <michael@...rulasolutions.com>
To: Andrew Lunn <andrew@...n.ch>
Cc: Marco Felsch <m.felsch@...gutronix.de>, 
	"Russell King (Oracle)" <linux@...linux.org.uk>, Wei Fang <wei.fang@....com>, 
	Shenwei Wang <shenwei.wang@....com>, Clark Wang <xiaoning.wang@....com>, 
	Andrew Lunn <andrew+netdev@...n.ch>, "David S. Miller" <davem@...emloft.net>, 
	Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, 
	Heiner Kallweit <hkallweit1@...il.com>, 
	"open list:FREESCALE IMX / MXC FEC DRIVER" <imx@...ts.linux.dev>, 
	"open list:FREESCALE IMX / MXC FEC DRIVER" <netdev@...r.kernel.org>, open list <linux-kernel@...r.kernel.org>
Subject: Re: [RFC PATCH] net: phy: integrate reset-after-clock quirk into phy_init_hw

Hi

On Wed, Jan 28, 2026 at 10:04 PM Michael Nazzareno Trimarchi
<michael@...rulasolutions.com> wrote:
>
> Hi
>
> On Wed, Jan 28, 2026 at 9:51 PM Andrew Lunn <andrew@...n.ch> wrote:
> >
> > > The issue was with the out-of-band reset coming from the FEC driver
> > > which doesn't honor the phy state-machine.
> >
> > Could you explain this is more details. Is the FEC doing something
> > wrong?
>
> The fact that the phy should be reset when the clk is provided to it, is not
> connected at all with the fec. I think that fec_main does not register itself
> as clock provider, You "should" define the phy to have a clock if this is needed
> during the restoration and we should not give any "magic" at controller level.
>
> * Marco * Your commit bedd8d78aba300860cec3f85d6ff549b3b7f2679 is clear
> and I have tried to use it but if I remember the problem is the clock
> is provided
> by the ethernet controller.

I have created this patch at that time but not solving it:

panicking@...icking:~/work/wandh/distro/linux-wh$ git show
bfe2e98b653637526213ba06dee92d2cf1f678b4
commit bfe2e98b653637526213ba06dee92d2cf1f678b4
Author: Michael Trimarchi <michael@...rulasolutions.com>
Date:   Sat Aug 23 09:34:22 2025 +0200

    ARM: dts: imx6ull-mrmmi: Describe the Ethernet PHY clock

    From d65af21842f8 ("net: phy: smsc: LAN8710/20: remove
PHY_RST_AFTER_CLK_EN flag"),
    the lan phy is not always reset the correct way and let time to time phy
    not configured.

    Change-Id: I21549981bdca7581dc65acf06007136c24be5d56
    Signed-off-by: Michael Trimarchi <michael@...rulasolutions.com>

diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-mrmmi.dtsi
b/arch/arm/boot/dts/nxp/imx/imx6ull-mrmmi.dtsi
index 03a870e317cd..0a1618ced6aa 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6ull-mrmmi.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6ull-mrmmi.dtsi
@@ -237,6 +237,8 @@ mdio {
                ethphy0: ethernet-phy@0 {
                        compatible = "ethernet-phy-ieee802.3-c22";
                        reg = <0>;
+                       clocks = <&clks IMX6UL_CLK_ENET_REF>;
+                       clock-names = "rmii-ref";
                        reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
                        reset-assert-us = <4000>;
                        reset-deassert-us = <4000>;

Michael

>
> Michael
>
>
> >
> >         Andrew
>
>
>
> --
> Michael Nazzareno Trimarchi
> Co-Founder & Chief Executive Officer
> M. +39 347 913 2170
> michael@...rulasolutions.com
> __________________________________
>
> Amarula Solutions BV
> Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
> T. +31 (0)85 111 9172
> info@...rulasolutions.com
> www.amarulasolutions.com



-- 
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael@...rulasolutions.com
__________________________________

Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info@...rulasolutions.com
www.amarulasolutions.com