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Message-ID: <82c6750d-8fa7-4837-b537-8fc6df9841a2@oss.qualcomm.com>
Date: Wed, 28 Jan 2026 11:08:18 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Jagadeesh Kona <jagadeesh.kona@....qualcomm.com>,
Bjorn Andersson <andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd
<sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Jagadeesh Kona <quic_jkona@...cinc.com>,
Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
Konrad Dybcio <konradybcio@...nel.org>
Cc: Ajit Pandey <ajit.pandey@....qualcomm.com>,
Imran Shaik <imran.shaik@....qualcomm.com>,
Taniya Das <taniya.das@....qualcomm.com>,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/8] dt-bindings: clock: qcom: Add X1P42100 video clock
controller
On 1/27/26 8:26 PM, Jagadeesh Kona wrote:
> X1P42100 video clock controller has most clocks same as SM8650,
> but it also has few additional clocks and resets. Add device
> tree bindings for the video clock controller on Qualcomm
> X1P42100 platform by defining these additional clocks and resets
> on top of SM8650.
>
> Signed-off-by: Jagadeesh Kona <jagadeesh.kona@....qualcomm.com>
> ---
[...]
> +#include "qcom,sm8650-videocc.h"
> +
> +/* X1P42100 introduces below new clocks and resets compared to SM8650 */
> +
> +/* VIDEO_CC clocks */
> +#define VIDEO_CC_MVS0_BSE_CLK 17
> +#define VIDEO_CC_MVS0_BSE_CLK_SRC 18
> +#define VIDEO_CC_MVS0_BSE_DIV4_DIV_CLK_SRC 19
I checked a number of platforms and the _BSE clocks are only present on
Purwa, without any explanation in the corresponding docs.
What are they used for?
Konrad
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