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Message-ID: <4c171a25-e395-4f83-b767-18525fffbee3@linux.dev>
Date: Wed, 28 Jan 2026 10:07:22 +0800
From: Qi Zheng <qi.zheng@...ux.dev>
To: Andrew Morton <akpm@...ux-foundation.org>
Cc: david@...nel.org, andreas@...sler.com, richard.weiyang@...il.com,
will@...nel.org, peterz@...radead.org, aneesh.kumar@...nel.org,
npiggin@...il.com, dev.jain@....com, ioworker0@...il.com, linmag7@...il.com,
linux-arch@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-mm@...ck.org, linux-alpha@...r.kernel.org, loongarch@...ts.linux.dev,
linux-mips@...r.kernel.org, linux-parisc@...r.kernel.org,
linux-um@...ts.infradead.org, sparclinux@...r.kernel.org,
Qi Zheng <zhengqi.arch@...edance.com>
Subject: Re: [PATCH v4 0/8] enable PT_RECLAIM on more 64-bit architectures
On 1/28/26 4:46 AM, Andrew Morton wrote:
> On Tue, 27 Jan 2026 20:12:53 +0800 Qi Zheng <qi.zheng@...ux.dev> wrote:
>
>> This series aims to enable PT_RECLAIM on more 64-bit architectures.
>
> Thanks, I updated mm.git's mm-unstable branch to v4.
>
>> Changes in v4:
>> - convert __HAVE_ARCH_TLB_REMOVE_TABLE to CONFIG_HAVE_ARCH_TLB_REMOVE_TABLE config
>> - fix a WARN_ON_ONCE() on sparc64 (and on ppc)
>> (reported by Andreas Larsson)
>> - collect Acked-by (Hi David, I've kept your Acked-by, feel free to drop it)
>> - rebase onto the v6.19-rc7
>>
>
> Below is how v4 altered mm.git.
>
> I'm not seeing the WARN_ON_ONCE() fix. I assume that was due to the
> Kconfig alterations?
Yes, sparc64 and ppc will select HAVE_ARCH_TLB_REMOVE_TABLE, so
PT_RECLAIM will not be enabled. This means it won't affect
sparc64 and ppc, and will not trigger WARN_ON_ONCE().
I don't have a testing environment for sparc64 and ppc, but I
expect it should be able to fix the WARN_ON_ONCE().
Thanks,
Qi
>
>
>
> --- a/arch/powerpc/include/asm/tlb.h~b
> +++ a/arch/powerpc/include/asm/tlb.h
> @@ -37,7 +37,6 @@ extern void tlb_flush(struct mmu_gather
> */
> #define tlb_needs_table_invalidate() radix_enabled()
>
> -#define __HAVE_ARCH_TLB_REMOVE_TABLE
> /* Get the generic bits... */
> #include <asm-generic/tlb.h>
>
> --- a/arch/powerpc/Kconfig~b
> +++ a/arch/powerpc/Kconfig
> @@ -305,6 +305,7 @@ config PPC
> select LOCK_MM_AND_FIND_VMA
> select MMU_GATHER_PAGE_SIZE
> select MMU_GATHER_RCU_TABLE_FREE
> + select HAVE_ARCH_TLB_REMOVE_TABLE
> select MMU_GATHER_MERGE_VMAS
> select MMU_LAZY_TLB_SHOOTDOWN if PPC_BOOK3S_64
> select MODULES_USE_ELF_RELA
> --- a/arch/sparc/include/asm/tlb_64.h~b
> +++ a/arch/sparc/include/asm/tlb_64.h
> @@ -33,7 +33,6 @@ void flush_tlb_pending(void);
> #define tlb_needs_table_invalidate() (false)
> #endif
>
> -#define __HAVE_ARCH_TLB_REMOVE_TABLE
> #include <asm-generic/tlb.h>
>
> #endif /* _SPARC64_TLB_H */
> --- a/arch/sparc/Kconfig~b
> +++ a/arch/sparc/Kconfig
> @@ -74,6 +74,7 @@ config SPARC64
> select HAVE_KRETPROBES
> select HAVE_KPROBES
> select MMU_GATHER_RCU_TABLE_FREE if SMP
> + select HAVE_ARCH_TLB_REMOVE_TABLE if SMP
> select MMU_GATHER_MERGE_VMAS
> select MMU_GATHER_NO_FLUSH_CACHE
> select HAVE_ARCH_TRANSPARENT_HUGEPAGE
> --- a/include/asm-generic/tlb.h~b
> +++ a/include/asm-generic/tlb.h
> @@ -213,7 +213,7 @@ struct mmu_table_batch {
> #define MAX_TABLE_BATCH \
> ((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *))
>
> -#ifndef __HAVE_ARCH_TLB_REMOVE_TABLE
> +#ifndef CONFIG_HAVE_ARCH_TLB_REMOVE_TABLE
> static inline void __tlb_remove_table(void *table)
> {
> struct ptdesc *ptdesc = (struct ptdesc *)table;
> --- a/mm/Kconfig~b
> +++ a/mm/Kconfig
> @@ -1448,9 +1448,12 @@ config ARCH_HAS_USER_SHADOW_STACK
> The architecture has hardware support for userspace shadow call
> stacks (eg, x86 CET, arm64 GCS or RISC-V Zicfiss).
>
> +config HAVE_ARCH_TLB_REMOVE_TABLE
> + def_bool n
> +
> config PT_RECLAIM
> def_bool y
> - depends on MMU_GATHER_RCU_TABLE_FREE
> + depends on MMU_GATHER_RCU_TABLE_FREE && !HAVE_ARCH_TLB_REMOVE_TABLE
> help
> Try to reclaim empty user page table pages in paths other than munmap
> and exit_mmap path.
> _
>
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