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Message-ID: <20260128125850.425264-9-biju.das.jz@bp.renesas.com>
Date: Wed, 28 Jan 2026 12:58:45 +0000
From: Biju <biju.das.au@...il.com>
To: Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Richard Cochran <richardcochran@...il.com>
Cc: Biju Das <biju.das.jz@...renesas.com>,
linux-renesas-soc@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
netdev@...r.kernel.org,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>,
Biju Das <biju.das.au@...il.com>
Subject: [PATCH net-next 8/8] arm64: dts: renesas: rzg3l-smarc-som: Enable eth0 (GBETH) interface
From: Biju Das <biju.das.jz@...renesas.com>
Enable the Gigabit Ethernet Interfaces (GBETH) populated on the RZ/G3L
SMARC EVK. The eth1, pincontrol definitions and hotplug support will be
added later.
Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
---
.../boot/dts/renesas/rzg3l-smarc-som.dtsi | 35 +++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi
index 7c21afaee9bc..f52af01a7eff 100644
--- a/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi
@@ -8,6 +8,10 @@
/ {
compatible = "renesas,rzg3l-smarcm", "renesas,r9a08g046l48", "renesas,r9a08g046";
+ aliases {
+ ethernet0 = ð0;
+ };
+
memory@...00000 {
device_type = "memory";
/* First 128MB is reserved for secure area. */
@@ -15,6 +19,37 @@ memory@...00000 {
};
};
+ð0 {
+ phy-handle = <&phy0>;
+ phy-mode = "rgmii-id";
+
+ status = "okay";
+};
+
+ð0_rxc_rx_clk {
+ clock-frequency = <125000000>;
+};
+
&extal_clk {
clock-frequency = <24000000>;
};
+
+&mdio0 {
+ phy0: ethernet-phy@7 {
+ compatible = "ethernet-phy-id0022.1640",
+ "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ rxc-skew-psec = <1400>;
+ txc-skew-psec = <1400>;
+ rxdv-skew-psec = <0>;
+ txdv-skew-psec = <0>;
+ rxd0-skew-psec = <0>;
+ rxd1-skew-psec = <0>;
+ rxd2-skew-psec = <0>;
+ rxd3-skew-psec = <0>;
+ txd0-skew-psec = <0>;
+ txd1-skew-psec = <0>;
+ txd2-skew-psec = <0>;
+ txd3-skew-psec = <0>;
+ };
+};
--
2.43.0
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