linux-kernel - Re: [PATCH RFCv1 1/3] PCI: Allow ATS to be always on for CXL.cache capable devices

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Message-ID: <20260128130520.GV1134360@nvidia.com>
Date: Wed, 28 Jan 2026 09:05:20 -0400
From: Jason Gunthorpe <jgg@...dia.com>
To: dan.j.williams@...el.com
Cc: "Tian, Kevin" <kevin.tian@...el.com>,
	Jonathan Cameron <jonathan.cameron@...wei.com>,
	Nicolin Chen <nicolinc@...dia.com>,
	"will@...nel.org" <will@...nel.org>,
	"robin.murphy@....com" <robin.murphy@....com>,
	"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
	"joro@...tes.org" <joro@...tes.org>,
	"praan@...gle.com" <praan@...gle.com>,
	"baolu.lu@...ux.intel.com" <baolu.lu@...ux.intel.com>,
	"miko.lenczewski@....com" <miko.lenczewski@....com>,
	"linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>,
	"iommu@...ts.linux.dev" <iommu@...ts.linux.dev>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	"linux-cxl@...r.kernel.org" <linux-cxl@...r.kernel.org>
Subject: Re: [PATCH RFCv1 1/3] PCI: Allow ATS to be always on for CXL.cache
 capable devices

On Tue, Jan 27, 2026 at 04:49:07PM -0800, dan.j.williams@...el.com wrote:
> > Yes, ARM took the position that ATS should be left disabled for
> > IDENTITY both because of SMMU constraints and also because it made
> > some sense that you wouldn't want ATS overhead just to get a 1:1
> > translation.
> 
> Does this mean that ARM already today does not enable ATS until driver
> attach, or is incremental work needed for that capability?

All of the iommu drivers setup an iommu translation and enable ATS
before any driver is bound.

We would need to do more work in the core to leave the translation
blocked when there is no driver. I don't think it is that difficult

> > Drivers need to ensure that ATS is disabled at PCI and Translated
> > requestes blocked in IOMMU HW while a BLOCKED domain is attached.
> 
> "Drivers" here meaning IOMMU drivers, right?

Yes

Jason