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Message-ID: <5d2e85cd-caa2-43a6-a451-3b822bd0ef01@baylibre.com>
Date: Thu, 29 Jan 2026 10:20:27 -0600
From: David Lechner <dlechner@...libre.com>
To: Antoniu Miclaus <antoniu.miclaus@...log.com>,
Lars-Peter Clausen <lars@...afoo.de>,
Michael Hennerich <Michael.Hennerich@...log.com>,
Jonathan Cameron <jic23@...nel.org>, Nuno Sá
<nuno.sa@...log.com>, Andy Shevchenko <andy@...nel.org>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, linux-iio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: iio: adc: ad4080: add AD4880 support
On 1/29/26 9:27 AM, Antoniu Miclaus wrote:
> Add AD4880 dual-channel ADC to the AD4080 bindings. The AD4880 is a
> dual-channel variant with two independent ADC channels, each with its
> own SPI configuration interface.
>
> For AD4880, the binding requires:
> - adi,aux-spi-cs property for secondary channel chip select
> - Two io-backends entries for each channel's data interface
>
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@...log.com>
> ---
> .../bindings/iio/adc/adi,ad4080.yaml | 49 ++++++++++++++++++-
> 1 file changed, 48 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
> index ccd6a0ac1539..3909e3095507 100644
> --- a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
> +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
> @@ -18,6 +18,9 @@ description: |
> service a wide variety of precision, wide bandwidth data acquisition
> applications.
>
> + The AD4880 is a dual-channel variant with two independent ADC channels,
> + each with its own SPI configuration interface.
> +
> https://www.analog.com/media/en/technical-documentation/data-sheets/ad4080.pdf
Can we get a datasheet link?
>
> $ref: /schemas/spi/spi-peripheral-props.yaml#
> @@ -31,10 +34,18 @@ properties:
> - adi,ad4084
> - adi,ad4086
> - adi,ad4087
> + - adi,ad4880
>
> reg:
> maxItems: 1
>
> + adi,aux-spi-cs:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Chip select for the auxiliary SPI interface used by multi-channel
> + devices like AD4880. Each additional channel beyond the first requires
> + its own SPI configuration interface on a separate chip select.
> +
> spi-max-frequency:
> description: Configuration of the SPI bus.
> maximum: 50000000
> @@ -57,7 +68,8 @@ properties:
> vrefin-supply: true
>
> io-backends:
> - maxItems: 1
> + minItems: 1
> + maxItems: 2
>
> adi,lvds-cnv-enable:
> description: Enable the LVDS signal type on the CNV pin. Default is CMOS.
> @@ -78,6 +90,23 @@ required:
> - vdd33-supply
> - vrefin-supply
>
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: adi,ad4880
> + then:
> + properties:
> + io-backends:
> + minItems: 2
> + required:
> + - adi,aux-spi-cs
> + else:
> + properties:
> + io-backends:
> + maxItems: 1
> +
> additionalProperties: false
>
> examples:
> @@ -98,4 +127,22 @@ examples:
> io-backends = <&iio_backend>;
> };
> };
> + - |
> + spi {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + adc@0 {
> + compatible = "adi,ad4880";
> + reg = <0>;
> + adi,aux-spi-cs = <1>;
We can already have multiple reg for a multiple CS device.
reg = <0>, <1>;
So we shouldn't need a new adi,aux-spi-cs property for that.
> + spi-max-frequency = <10000000>;
> + vdd33-supply = <&vdd33>;
> + vddldo-supply = <&vddldo>;
> + vrefin-supply = <&vrefin>;
> + clocks = <&cnv>;
> + clock-names = "cnv";
> + io-backends = <&iio_backend_cha>, <&iio_backend_chb>;
> + };
> + };
> ...
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