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Message-ID: <20260129051303.376551-1-kuba@kernel.org>
Date: Wed, 28 Jan 2026 21:13:03 -0800
From: Jakub Kicinski <kuba@...nel.org>
To: rkannoth@...vell.com
Cc: Jakub Kicinski <kuba@...nel.org>,
	edumazet@...gle.com,
	sumang@...vell.com,
	linux-kernel@...r.kernel.org,
	sbhatta@...vell.com,
	davem@...emloft.net,
	netdev@...r.kernel.org,
	pabeni@...hat.com,
	andrew+netdev@...n.ch,
	sgoutham@...vell.com
Subject: Re: [net-next,v6,02/13] octeontx2-af: npc: cn20k: KPM profile changes

This is an AI-generated review of your patch. The human sending this
email has considered the AI review valid, or at least plausible.

For local reproduction steps see https://netdev-ai.bots.linux.dev/ai-local.html
---
octeontx2-af: npc: cn20k: KPM profile changes

This patch adds KPM (KPU Module) profile support for CN20K silicon,
which groups 16 KPUs into 8 KPM profiles (KPM0 = KPU0 + KPU8, etc.)
for more efficient parser resource usage.

> diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
> index 30cc05c64487..dfd94a30d81c 100644
> --- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c
> +++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c

[ ... ]

> +static void
> +npc_config_kpmaction(struct rvu *rvu, int blkaddr,
> +		     const struct npc_kpu_profile_action *kpuaction,
> +		     int kpm, int entry, bool pkind)
> +{
> +	struct npc_kpm_action0 action0 = {0};
> +	struct npc_kpu_action1 action1 = {0};
> +	u64 reg;
> +
> +	action1.errlev = kpuaction->errlev;
> +	action1.errcode = kpuaction->errcode;
> +	action1.dp0_offset = kpuaction->dp0_offset;
> +	action1.dp1_offset = kpuaction->dp1_offset;
> +	action1.dp2_offset = kpuaction->dp2_offset;

[ ... ]

> +	action0.capture_flags = kpuaction->flags;
                               ^^^^^^^^^^^^^^^^

The npc_kpm_action0 structure defines capture_flags as a 4-bit field,
while kpuaction->flags is u8 (8 bits). The KPU profiles use flag values
such as NPC_F_LA_U_HAS_IH_NIX (0x20), NPC_F_LA_U_HAS_HIGIG2 (0x40), and
NPC_F_LB_U_UNK_ETYPE (0x80), which all exceed what 4 bits can represent.

Is this truncation intentional for the CN20K hardware register layout?
If so, will the parser functionality work correctly when these upper
flag bits are silently discarded?

> +	action0.ptr_advance = kpuaction->ptr_advance;

[ ... ]

> diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
> index 26da0a2c717a..55882a0f37fc 100644
> --- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h
> +++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h

[ ... ]

> +struct npc_kpm_action0 {
> +#if defined(__BIG_ENDIAN_BITFIELD)

[ ... ]

> +	u64 rsvd_32_35     : 4;
> +	u64 capture_flags  : 4;

For reference, the existing npc_kpu_action0 in npc.h has capture_flags
as 8 bits without the rsvd_32_35 field. This structural difference
appears intentional for CN20K hardware, but the same KPU profiles
containing flags > 15 are loaded via npc_load_kpu_profile() for CN20K.

> +	u64 ptr_advance    : 8;

[ ... ]

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