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Message-ID: <286fcc0754de31969e0d856a075b9de97b28ed86.1769681553.git.biju.das.jz@bp.renesas.com>
Date: Thu, 29 Jan 2026 10:16:42 +0000
From: Biju <biju.das.au@...il.com>
To: biju.das.au@...il.com
Cc: linux-renesas-soc@...r.kernel.org,
biju.das.jz@...renesas.com,
Geert Uytterhoeven <geert+renesas@...der.be>,
Linus Walleij <linusw@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Magnus Damm <magnus.damm@...il.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-clk@...r.kernel.org
Subject: [PATCH RESEND 7/9] arm64: dts: renesas: r9a08g046: Add pincontrol node
From: Biju Das <biju.das.jz@...renesas.com>
Add pincontrol node to RZ/G3L ("R9A08G046") SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
---
arch/arm64/boot/dts/renesas/r9a08g046.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
index 231b118ecc62..c6b042ac9c36 100644
--- a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
@@ -181,9 +181,19 @@ sysc: system-controller@...20000 {
};
pinctrl: pinctrl@...30000 {
+ compatible = "renesas,r9a08g046-pinctrl";
reg = <0 0x11030000 0 0x10000>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pinctrl 0 0 232>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&cpg CPG_MOD R9A08G046_GPIO_HCLK>;
+ power-domains = <&cpg>;
+ resets = <&cpg R9A08G046_GPIO_RSTN>,
+ <&cpg R9A08G046_GPIO_PORT_RESETN>,
+ <&cpg R9A08G046_GPIO_SPARE_RESETN>;
+ reset-names = "rstn", "port", "spare";
};
dmac: dma-controller@...20000 {
--
2.43.0
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