linux-kernel - Re: [PATCH v2 1/3] dt-bindings: interconnect: qcom,qcs8300-rpmh: add clocks property to enable QoS

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Message-ID: <d50ef396-5d02-4b26-89aa-1a9d2950a290@oss.qualcomm.com>
Date: Thu, 29 Jan 2026 11:32:54 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Odelu Kukatla <odelu.kukatla@....qualcomm.com>,
        Georgi Djakov <djakov@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
 <conor+dt@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>
Cc: Raviteja Laggyshetty <raviteja.laggyshetty@....qualcomm.com>,
        Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
        Bartosz Golaszewski <bartosz.golaszewski@...aro.org>,
        linux-arm-msm@...r.kernel.org, linux-pm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Mike Tipton <mike.tipton@....qualcomm.com>
Subject: Re: [PATCH v2 1/3] dt-bindings: interconnect: qcom,qcs8300-rpmh: add
 clocks property to enable QoS

On 1/29/26 11:10 AM, Odelu Kukatla wrote:
> 
> 
> On 1/27/2026 4:24 PM, Konrad Dybcio wrote:
>> On 1/27/26 10:01 AM, Odelu Kukatla wrote:
>>> Some QCS8300 interconnect nodes have QoS registers located inside
>>> a block whose interface is clock-gated. For those nodes, driver
>>> must enable the corresponding clock(s) before accessing the
>>> registers. Add the 'clocks' property so the driver can obtain
>>> and enable the required clock(s).
>>>
>>> Only interconnects that have clock‑gated QoS register interface
>>> use this property; it is not applicable to all interconnect nodes.
>>>
>>> Signed-off-by: Odelu Kukatla <odelu.kukatla@....qualcomm.com>
>>> ---

[...]

>>> +  - if:
>>> +      properties:
>>> +        compatible:
>>> +          contains:
>>> +            enum:
>>> +              - qcom,qcs8300-aggre2-noc
>>> +    then:
>>> +      properties:
>>> +        clocks:
>>> +          items:
>>> +            - description: RPMH CC IPA clock
>>
>> LeMans also has ufscard clk here
>>
> 
> For aggre2 noc, QCS8300 does not integrate the ufscard controller
> present on LeMans, so that clock is not part of the QCS8300 hardware.
> The only QoS relevant clock on this node for QCS8300 is the RPMH CC IPA
> clock, which is why only that one appears in the binding.

Ohhh I forgot UFSCard translated to UFS1..


>>> +
>>> +  - if:
>>> +      properties:
>>> +        compatible:
>>> +          contains:
>>> +            enum:
>>> +              - qcom,qcs8300-gem-noc
>>> +    then:
>>> +      properties:
>>> +        clocks:
>>> +          items:
>>> +            - description: GCC DDRSS GPU AXI clock
>>
>> and lacks this one
>>
>> Are there actual reasons for these differences?
>>
> 
> The gem noc QoS interface on QCS8300 requires the DDRSS GPU AXI clock to
> be enabled for QoS register access, so it is listed in the binding. The
> difference is therefore due to SoC level differences.

Alright, thanks

Konrad