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Message-ID: <CAAhV-H57b14qY+5jqe+Fd5FTQq6jrhurfNBCqBqwG6SUpKFhTw@mail.gmail.com>
Date: Thu, 29 Jan 2026 19:08:48 +0800
From: Huacai Chen <chenhuacai@...nel.org>
To: Bibo Mao <maobibo@...ngson.cn>
Cc: WANG Xuerui <kernel@...0n.name>, Tianrui Zhao <zhaotianrui@...ngson.cn>, 
	loongarch@...ts.linux.dev, linux-kernel@...r.kernel.org, kvm@...r.kernel.org
Subject: Re: [PATCH v2] LoongArch: KVM: Add more CPUCFG mask bit

On Thu, Jan 29, 2026 at 6:00 PM Bibo Mao <maobibo@...ngson.cn> wrote:
>
>
>
> On 2026/1/29 下午5:26, Huacai Chen wrote:
> > Hi, Bibo,
> >
> > On Mon, Jan 26, 2026 at 10:48 AM Bibo Mao <maobibo@...ngson.cn> wrote:
> >>
> >> With LA664 CPU there are more features supported which are indicated
> >> in CPUCFG2 bit24:30 and CPUCFG3 bit17 and bit 23. KVM hypervisor can
> >> not enable or disable these features and there is no KVM exception
> >> when instructions of these features are used in guest mode.
> >>
> >> Here add more CPUCFG mask support with LA664 CPU type.
> >>
> >> Signed-off-by: Bibo Mao <maobibo@...ngson.cn>
> >> ---
> >>    1. Rebase on the latest version since some common CPUCFG bit macro
> >>       definitions are merged.
> >>    2. Modifiy the comments explaining why it comes from feature detect
> >>       of host CPU.
> >> ---
> >>   arch/loongarch/kvm/vcpu.c | 15 +++++++++++++++
> >>   1 file changed, 15 insertions(+)
> >>
> >> diff --git a/arch/loongarch/kvm/vcpu.c b/arch/loongarch/kvm/vcpu.c
> >> index 656b954c1134..a9608469fa7a 100644
> >> --- a/arch/loongarch/kvm/vcpu.c
> >> +++ b/arch/loongarch/kvm/vcpu.c
> >> @@ -652,6 +652,8 @@ static int _kvm_setcsr(struct kvm_vcpu *vcpu, unsigned int id, u64 val)
> >>
> >>   static int _kvm_get_cpucfg_mask(int id, u64 *v)
> >>   {
> >> +       unsigned int config;
> >> +
> >>          if (id < 0 || id >= KVM_MAX_CPUCFG_REGS)
> >>                  return -EINVAL;
> >>
> >> @@ -684,9 +686,22 @@ static int _kvm_get_cpucfg_mask(int id, u64 *v)
> >>                  if (cpu_has_ptw)
> >>                          *v |= CPUCFG2_PTW;
> >>
> >> +               /*
> >> +                * The capability indication of some features are the same
> >> +                * between host CPU and guest vCPU, and there is no special
> >> +                * feature detect method with vCPU. Also KVM hypervisor can
> >> +                * not enable or disable these features.
> >> +                *
> >> +                * Here use host CPU detected features for vCPU
> >> +                */
> >> +               config = read_cpucfg(LOONGARCH_CPUCFG2);
> >> +               *v |= config & (CPUCFG2_FRECIPE | CPUCFG2_DIV32 | CPUCFG2_LAM_BH);
> >> +               *v |= config & (CPUCFG2_LAMCAS | CPUCFG2_LLACQ_SCREL | CPUCFG2_SCQ);
> >>                  return 0;
> >>          case LOONGARCH_CPUCFG3:
> >>                  *v = GENMASK(16, 0);
> >> +               config = read_cpucfg(LOONGARCH_CPUCFG3);
> >> +               *v |= config & (CPUCFG3_DBAR_HINTS | CPUCFG3_SLDORDER_STA);
> > What about adding CPUCFG3_ALDORDER_STA and CPUCFG3_ASTORDER_STA here, too?
> I am ok to add these bits.
>
> It is strange that there is both capability bit and status bit. AFAIK
> cpucfg is read-only, status bit means that it will change at runtime. I
> will negotiate with HW guys about these bits.
OK, then maybe capability bits should also be added here.

Huacai

>
> Regards
> Bibo Mao
> >
> > Huacai
> >
> >>                  return 0;
> >>          case LOONGARCH_CPUCFG4:
> >>          case LOONGARCH_CPUCFG5:
> >>
> >> base-commit: 63804fed149a6750ffd28610c5c1c98cce6bd377
> >> --
> >> 2.39.3
> >>
> >>
>
>

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