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Message-ID: <76c24508-bb75-475a-b973-d7ad18c302ce@oss.qualcomm.com>
Date: Thu, 29 Jan 2026 12:23:07 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Viresh Kumar <viresh.kumar@...aro.org>
Cc: webgeek1234@...il.com, Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
 <conor+dt@...nel.org>, Viresh Kumar <vireshk@...nel.org>,
        Lukasz Luba <lukasz.luba@....com>,
        "Rafael J. Wysocki" <rafael@...nel.org>, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Xilin Wu <wuxilin123@...il.com>
Subject: Re: [PATCH] arm64: dts: qcom: sm8550: Update EAS properties

On 1/29/26 12:05 PM, Viresh Kumar wrote:
> On 29-01-26, 12:00, Konrad Dybcio wrote:
>> On 1/28/26 8:11 PM, Aaron Kling via B4 Relay wrote:
>>> It should be noted that the A715 cores seem less efficient than the
>>> A710 cores. Therefore, an average value has been assigned to them,
>>> considering that the A715 and A710 cores share a single cpufreq
>>> domain.
>>
>> Regarding the CPUFreq domain shared across cores with different power
>> characteristics, I think we shouldn't be lying to the OS, rather Linux
>> should be able to deal with it, somehow.
> 
> cpufreq-domain == cpufreq-policy here I guess. All CPUs that change
> their DVFS state together should be part of one policy. Not sure if
> there is something else you were pointing at.

Yes, they change their state together.

The question is whether it's okay for these CPUs to have different
dynamic-power-coefficient values, and whether the EM code won't be
thrown off by that.

Again, they differ because within that shared policy, there's 2
separate kinds of cores (2x Cortex-A715 + 2x Cortex-A710).

Konrad

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