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Message-ID: <aXzPck9B6cTsTTwU@lizhi-Precision-Tower-5810>
Date: Fri, 30 Jan 2026 10:34:10 -0500
From: Frank Li <Frank.li@....com>
To: Sai Sree Kartheek Adivi <s-adivi@...com>
Cc: peter.ujfalusi@...il.com, vkoul@...nel.org, robh@...nel.org,
krzk+dt@...nel.org, conor+dt@...nel.org, nm@...com,
ssantosh@...nel.org, dmaengine@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, vigneshr@...com,
r-sharma3@...com, gehariprasath@...com
Subject: Re: [PATCH v4 13/19] dt-bindings: dma: ti: Add K3 PKTDMA V2
On Fri, Jan 30, 2026 at 04:31:53PM +0530, Sai Sree Kartheek Adivi wrote:
> New binding document for
> Texas Instruments K3 Packet DMA (PKTDMA) V2.
>
> PKTDMA V2 is introduced as part of AM62L.
>
> Signed-off-by: Sai Sree Kartheek Adivi <s-adivi@...com>
> ---
> .../bindings/dma/ti/ti,k3-pktdma-v2.yaml | 90 +++++++++++++++++++
> 1 file changed, 90 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dma/ti/ti,k3-pktdma-v2.yaml
>
> diff --git a/Documentation/devicetree/bindings/dma/ti/ti,k3-pktdma-v2.yaml b/Documentation/devicetree/bindings/dma/ti/ti,k3-pktdma-v2.yaml
> new file mode 100644
> index 0000000000000..e8afa6f6738b7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/ti/ti,k3-pktdma-v2.yaml
> @@ -0,0 +1,90 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (C) 2024-2025 Texas Instruments Incorporated
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/ti/ti,k3-pktdma-v2.yaml#
filename need use one of compatible string.
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Texas Instruments K3 DMSS PKTDMA V2
> +
> +maintainers:
> + - Sai Sree Kartheek Adivi <s-adivi@...com>
> +
> +description: |
Needn't |
> + The PKTDMA V2 is intended to perform similar functions as the packet mode
> + channels of K3 UDMA-P. PKTDMA V2 only includes Split channels to service
> + PSI-L based peripherals.
> +
> + The peripherals can be PSI-L native or legacy, non PSI-L native peripherals
> + with PDMAs. PDMA is tasked to act as a bridge between the PSI-L fabric and the
> + legacy peripheral.
> +
> +allOf:
> + - $ref: /schemas/dma/dma-controller.yaml#
> +
> +properties:
> + compatible:
> + const: ti,am62l-dmss-pktdma
> +
> + reg:
> + items:
> + - description: Packet DMA Control /Status
> + - description: Channel Realtime
> + - description: Ring Realtime
> +
> + reg-names:
> + items:
> + - const: gcfg
> + - const: chanrt
> + - const: ringrt
> +
> + "#dma-cells":
> + const: 2
> + description: |
> + cell 1: Channel identification for the peripheral
> + PSI-L thread ID of the remote (to BCDMA) end.
> + Valid ranges for thread ID depends on the data movement direction:
> + for source thread IDs (rx): 0 - 0x7fff
> + for destination thread IDs (tx): 0x8000 - 0xffff
> +
> + Please refer to the device documentation for the PSI-L thread map and
> + also the PSI-L peripheral chapter for the correct thread ID.
> +
> + cell 2: ASEL value for the channel
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - "#dma-cells"
No irq and clock?
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + main {
> + #address-cells = <2>;
> + #size-cells = <2>;
If use 32bit address, needn't main
> +
> + main_pktdma: dma-controller@...c0000 {
Need need label
> + compatible = "ti,am62l-dmss-pktdma";
> + reg = <0x00 0x485c0000 0x00 0x4000>,
> + <0x00 0x48900000 0x00 0x80000>,
> + <0x00 0x47200000 0x00 0x100000>;
> + reg-names = "gcfg", "chanrt", "ringrt";
> + #dma-cells = <2>;
> + };
> +
> + serial@...0000 {
Needn't this in example.
Frank
> + compatible = "ti,am64-uart", "ti,am654-uart";
> + reg = <0x00 0x02800000 0x00 0x100>;
> + power-domains = <&scmi_pds 89>;
> + clocks = <&scmi_clk 358>;
> + clock-names = "fclk";
> + dmas = <&main_pktdma 0xc400 0>,
> + /* tx: PSI-L thread ID, ASEL value */
> + <&main_pktdma 0x4400 0>;
> + /* rx: PSI-L thread ID, ASEL value */
> + dma-names = "tx", "rx";
> + };
> + };
> --
> 2.34.1
>
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