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Message-ID:
<PAXPR04MB8510831BD69AA3BE71E03472889FA@PAXPR04MB8510.eurprd04.prod.outlook.com>
Date: Fri, 30 Jan 2026 02:25:16 +0000
From: Wei Fang <wei.fang@....com>
To: Michael Trimarchi <michael@...rulasolutions.com>
CC: "open list:FREESCALE IMX / MXC FEC DRIVER" <imx@...ts.linux.dev>, "open
list:FREESCALE IMX / MXC FEC DRIVER" <netdev@...r.kernel.org>, open list
<linux-kernel@...r.kernel.org>, Shenwei Wang <shenwei.wang@....com>, Clark
Wang <xiaoning.wang@....com>, Andrew Lunn <andrew+netdev@...n.ch>, "David S.
Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, Jakub
Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, Heiner Kallweit
<hkallweit1@...il.com>, Russell King <linux@...linux.org.uk>, "open
list:FREESCALE IMX / MXC FEC DRIVER" <imx@...ts.linux.dev>, "open
list:FREESCALE IMX / MXC FEC DRIVER" <netdev@...r.kernel.org>, open list
<linux-kernel@...r.kernel.org>
Subject: RE: [RFC PATCH] net: phy: integrate reset-after-clock quirk into
phy_init_hw
> The current implementation of phy_reset_after_clk_enable requires MAC
> drivers
> (like fec_main.c) to manually track PHY probing states and trigger resets
> at specific points in their clock management flow and was created just for a SoC
> vendor. This leads to fragile code in the Ethernet driver, involving complex
> checks to see if the PHY device is bound.
>
> This patch proposes moving the handling of the PHY_RST_AFTER_CLK_EN flag
> directly
> into the generic phy_init_hw() function.
>
> Signed-off-by: Michael Trimarchi <michael@...rulasolutions.com>
> ---
>
> I need to test better some boards that need this reset, but
> I need to confirm if the general approach is ok
This patch looks good to me, it is more generic than the previous
solution. I do not have a board that uses SMSC LAN8710/LAN8720
or other PHYs, so I can not help verify the solution, but I think it
should fix the issue that reported on the i.MX platform. Thanks.
Acked-by: Wei Fang <wei.fang@....com>
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