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Message-ID: <8d3a2c5e-b31d-4346-ac47-12f9aa1b49aa@tuxon.dev>
Date: Fri, 30 Jan 2026 09:18:18 +0200
From: claudiu beznea <claudiu.beznea@...on.dev>
To: ryan.wanner@...rochip.com, mturquette@...libre.com, sboyd@...nel.org,
nicolas.ferre@...rochip.com, alexandre.belloni@...tlin.com,
bmasney@...hat.com, alexander.sverdlin@...il.com,
varshini.rajendran@...rochip.com
Cc: cristian.birsan@...rochip.com, balamanikandan.gunasundar@...rochip.com,
linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 14/31] clk: at91: clk-pll: add support for parent_hw
On 1/16/26 22:07, ryan.wanner@...rochip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@...on.dev>
>
> Add support for parent_hw in pll clock driver.
Isn't it parent_data?
> With this parent-child
> relation is described with pointers rather than strings making
> registration a bit faster.
Please update this along with s/parent_hw/parent_data above.
>
> All the SoC based drivers that rely on clk-pll were adapted
> to the new API change. The switch itself for SoCs will be done
> in subsequent patches.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@...on.dev>
> Signed-off-by: Ryan Wanner <Ryan.Wanner@...rochip.com>
The rest LGTM. With the description adjusted:
Reviewed-by: Claudiu Beznea <claudiu.beznea@...on.dev>
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