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Message-ID: <20260131112440.2915-1-cp0613@linux.alibaba.com>
Date: Sat, 31 Jan 2026 19:24:40 +0800
From: cp0613@...ux.alibaba.com
To: atish.patra@...ux.dev,
	anup@...infault.org,
	alex@...ti.fr,
	pjw@...nel.org,
	guoren@...nel.org
Cc: linux-riscv@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	Chen Pei <cp0613@...ux.alibaba.com>
Subject: [PATCH] drivers/perf: riscv: Keep the fixed counter counting

From: Chen Pei <cp0613@...ux.alibaba.com>

The RISC-V SBI PMU driver disables all PMU counters during initialization
via pmu_sbi_stop_all. For fixed counters CYCLE, TIME and INSTRET, this is
unnecessary for the following two reasons:

1. Some kernel driver code may directly read CYCLE and INSTRET to perform
   simple performance analysis.
2. In legacy mode, user space directly reads CYCLE and INSTRET. (echo 2 >
   /proc/sys/kernel/perf_user_access)

Therefore, We keep counting CYCLE, TIME and INSTRET.

Signed-off-by: Chen Pei <cp0613@...ux.alibaba.com>
---
 drivers/perf/riscv_pmu_sbi.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
index 7dd282da67ce..93aaab324443 100644
--- a/drivers/perf/riscv_pmu_sbi.c
+++ b/drivers/perf/riscv_pmu_sbi.c
@@ -899,6 +899,9 @@ static int pmu_sbi_get_ctrinfo(int nctr, unsigned long *mask)
 
 static inline void pmu_sbi_stop_all(struct riscv_pmu *pmu)
 {
+	/* We keep counting CYCLE, TIME and INSTRET. */
+	pmu->cmask &= ~0x7;
+
 	/*
 	 * No need to check the error because we are disabling all the counters
 	 * which may include counters that are not enabled yet.
-- 
2.50.1


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