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Message-ID: <20260131172611.28807-1-dinguyen@kernel.org>
Date: Sat, 31 Jan 2026 11:26:11 -0600
From: Dinh Nguyen <dinguyen@...nel.org>
To: miquel.raynal@...tlin.com,
	richard@....at,
	vigneshr@...com
Cc: dinguyen@...nel.org,
	linux-mtd@...ts.infradead.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Khairul Anuar Romli <khairul.anuar.romli@...era.com>,
	Rob Herring <robh@...nel.org>
Subject: [PATCH] dt-bindings: mtd: cdns,hp-nfc: Add dma-coherent property

From: Khairul Anuar Romli <khairul.anuar.romli@...era.com>

The Cadence HP NAND Flash Controller on supports DMA transactions through
a coherent interconnect. In previous generations SoC (Stratix10 and Agilex)
the interconnect was non-coherent, hence there is no need for dma-coherent
property to be presence. In Agilex 5, the architecture has changed. It
introduced a coherent interconnect that supports cache-coherent DMA.

Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@...era.com>
Reviewed-by: Rob Herring (Arm) <robh@...nel.org>
Signed-off-by: Dinh Nguyen <dinguyen@...nel.org>
---
 Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml b/Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml
index 73dc69cee4d8..367257a227b1 100644
--- a/Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml
+++ b/Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml
@@ -40,6 +40,8 @@ properties:
   dmas:
     maxItems: 1
 
+  dma-coherent: true
+
   iommus:
     maxItems: 1
 
-- 
2.42.0.411.g813d9a9188


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