linux-kernel - [PATCH] dt-bindings: dma: snps,dw-axi-dmac: add dma-coherent property

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Message-ID: <20260131172856.29227-1-dinguyen@kernel.org>
Date: Sat, 31 Jan 2026 11:28:56 -0600
From: Dinh Nguyen <dinguyen@...nel.org>
To: Eugeniy.Paltsev@...opsys.com,
	vkoul@...nel.org
Cc: dinguyen@...nel.org,
	dmaengine@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Khairul Anuar Romli <khairul.anuar.romli@...era.com>,
	Rob Herring <robh@...nel.org>
Subject: [PATCH] dt-bindings: dma: snps,dw-axi-dmac: add dma-coherent property

From: Khairul Anuar Romli <khairul.anuar.romli@...era.com>

The Synopsys DesignWare AXI DMA Controller on Agilex5, the controller
operates on a cache-coherent AXI interface, where DMA transactions are
automatically kept coherent with the CPU caches. In previous generations
SoC (Stratix10 and Agilex) the interconnect was non-coherent, hence there
is no need for dma-coherent property to be presence. In Agilex 5, the
architecture has changed. It  introduced a coherent interconnect that
supports cache-coherent DMA.

Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@...era.com>
Reviewed-by: Rob Herring (Arm) <robh@...nel.org>
Signed-off-by: Dinh Nguyen <dinguyen@...nel.org>
---
 Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
index 216cda21c538..e12a48a12ea4 100644
--- a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
+++ b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
@@ -68,6 +68,8 @@ properties:
 
   dma-noncoherent: true
 
+  dma-coherent: true
+
   resets:
     minItems: 1
     maxItems: 2
-- 
2.42.0.411.g813d9a9188