linux-kernel - Re: [PATCH] dt-bindings: dma: snps,dw-axi-dmac: add dma-coherent property

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Message-ID: <f5183a72-6ea4-4d68-b136-f6d83a36493d@kernel.org>
Date: Sun, 1 Feb 2026 13:30:59 -0600
From: Dinh Nguyen <dinguyen@...nel.org>
To: Conor Dooley <conor@...nel.org>
Cc: Eugeniy.Paltsev@...opsys.com, vkoul@...nel.org,
 dmaengine@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org,
 Khairul Anuar Romli <khairul.anuar.romli@...era.com>,
 Rob Herring <robh@...nel.org>
Subject: Re: [PATCH] dt-bindings: dma: snps,dw-axi-dmac: add dma-coherent
 property



On 1/31/26 14:27, Conor Dooley wrote:
> On Sat, Jan 31, 2026 at 11:28:56AM -0600, Dinh Nguyen wrote:
>> From: Khairul Anuar Romli <khairul.anuar.romli@...era.com>
>>
>> The Synopsys DesignWare AXI DMA Controller on Agilex5, the controller
>> operates on a cache-coherent AXI interface, where DMA transactions are
>> automatically kept coherent with the CPU caches. In previous generations
>> SoC (Stratix10 and Agilex) the interconnect was non-coherent, hence there
>> is no need for dma-coherent property to be presence. In Agilex 5, the
>> architecture has changed. It  introduced a coherent interconnect that
>> supports cache-coherent DMA.
>>
>> Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@...era.com>
>> Reviewed-by: Rob Herring (Arm) <robh@...nel.org>
> 
> Why does this v1 have an ack?
> 

I respun this patch based on the dmaengine tree so that the dma engine 
maintainer can take it. I had originally applied it to my tree, but 
avoid potential merge conflicts, I'm going to submit it through dma. 
This patch is the same as this[1].

Sorry for any confusion.

Dinh
[1] 
https://lore.kernel.org/linux-devicetree/176488420978.2206697.11201292177123636920.robh@kernel.org/